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Product Pitch & Final Video

Product Pitch & Final Video

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Digital synthesis is a convenient and powerful way to create and manipulate sounds. Software synthesizers run on a CPU are feature packed, but reliant on a slow and bulky general purpose computer. Hardware synthesizers are faster and more portable, but tend to provide limited control over the sound due to pricey ASICs and analog circuits. The FMPGA is a digital synthesizer built on an FPGA designed to bring software-level functionality to a high performance platform. Using a MIDI keyboard, a…

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Joe’s status report for 12/5

Joe’s status report for 12/5

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This week, I updated the fixed point units/wrote a fixed point inverter, envelope generator, and applicators all in SystemVerilog, and verified all of their functionality against software models. The envelope generator currently has a bug that I believe I have narrowed down to an issue with multiplication, but I had to move on from it temporarily in order to finish out the rest of my parts before the presentation. I have integrated all of these parts into the larger APU…

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Team status update for 11/07

Team status update for 11/07

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This week, we have all been working towards making working prototypes for the upcoming demos. Manav has been working on being able to show we can decode simulated MIDI inputs. The MIDI keyboard came in this week, so he is able to sample real inputs for testing, though this might not be feasible before the demo. Eric has finished the encoders module and is working on demoing our display. He won’t be able to demo the real LCD screen yet,…

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Joe’s status update for 11/07

Joe’s status update for 11/07

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This week, I implemented and verified the software distortion effect. It uses entirely modular fixed point data types and is true to the hardware. In the picture below, the orange triangle wave is the input sound wave, and the blue curve is the output after applying the distortion effect. Demos came up a bit fast on me, so I decided to start integration before implementing the low/high pass filters. I addressed all Git reviews from Eric and Manav for all…

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Team status update for 10/31

Team status update for 10/31

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Right now, Manav is in need of the MIDI keyboard to start accurately testing his module. We placed the order earlier this week, and hopefully it comes in soon. We’ve received the rest of our parts, so all other testing can start as soon as we’re ready. Aside from that, the only major roadblock right now is time. We all had a rough couple of weeks because of midterms, but the mid-semester set of tests are over, so hopefully we…

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Joe’s status update 10/31

Joe’s status update 10/31

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This week, I finished the applicator model and its testbench. I spent too long trying to fiddle with parameterization, both within the testbench and model, since there will be multiple applicators that are all slightly different. In the end, I decided the best use of my time was to make a general applicator to show proof of concept, and worry about verifying each individual one once I implement the hardware. I don’t anticipate them being too different, so this shouldn’t…

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Joe Status Update 10/25

Joe Status Update 10/25

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This week, I didn’t get much done unfortunately. I started work on the applicator  applicator software model, and the test bench is on its way but it’s a bit tricky to write because I need to emulate the  functionality of all the modulation sources (envelopes, LFOs, wavetables) in SystemVerilog, which isn’t trivial. It might be better to just test this module alone, without the software model. Next week, I really need to figure out what I’m doing with the applicator…

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Team Status Update for 10/24

Team Status Update for 10/24

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With the Design Report behind us, it feels like we have a solid foundation to deal with a lot of the complexities of our module. Joe has been working hard on the APU, and for the first time, we have a defined goal for how our filters and distortion effects will work. We’re pretty confident that this new level of rigidity for our specification will allow us to build out the hardware without all of the delays over implementation details….

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Team status report for 10/17

Team status report for 10/17

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Some of the feedback from our presentation showed concern with the size of our project, and we would agree that currently, the biggest risk to our project is time. It’s  proving tough to keep up with our schedule. We have already planned for this and have revised our schedule since the proposal to be a bit more realistic while still building in slack to our schedule. Eric has determined that the video layer will require a bit more complexity in…

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Joe’s status report for 10/17

Joe’s status report for 10/17

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This week, I implemented the wavetable oscillator in Python. It meets our requirements of <1% deviation in pitch, and can output sawtooth, square waves, and sine waves. I am very happy with it because it was the one component we were nervous about meeting our requirements for, since we didn’t have too much of a basis for deviation in pitch. The model was written very similar to how it would be implemented in hardware, so it should be fairly fast…

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