This week, I have been spending the majority of my time ensuring that all of my portion (the midi and audio layers) are fully implemented, tested, and integrate with the rest of the code that is a part of this project. As of right now, based on all the testing that I have done, I can say that everything works in simulation. This consisted of more thoroughly testing the midi decoder, implementing and testing an event packager to turn midi…
This week, I implemented the hardware description of the wavetable oscillator. To do so, this also required implementing ROM and the fixed-point unit in hardware. All of these transitions went quite smoothly, and the wavetable oscillator has been verified against my software model and they produce identical outputs over hundreds of thousands of clock cycles. I am starting to dip into expected slack weeks this week, but I plan to hopefully get a lot more of the hardware description completed…
This week, we worked hard to get each of our respective components into something demo-able. Eric was able to show a software simulation of the display. Manav has the entire MIDI layer SystemVerilog code debugged in simulation and was working on transferring it to the FPGA. While he wasn’t able to get this done by the demo, he made a lot of headway learning about how to interface with the GPIO pins on the FPGA. Joe was able to write…
This week, I worked on trying to get all the necessary components ready for the demo on Monday. This meant writing a lot of software before we wrote any hardware, since we plan for the demo to be completely based in our software co-simulation environment. The encoders, I can say proudly, are finally done–after talking about the parameters that they hold and control with Joe, I have finally settled on a system that will allow us to have the correct…
This week, I focused on studying the test suite and example python scripts to model a software version of the sampler and MIDI decoder. I had to refactor the MIDI decoder from last week since there were a couple of misunderstanding. I will be trying to decide whether to use UART or USB for the MIDI input. For the sample, I have determined and made pseudocode for a basic version of the sampler in SystemVerilog. I have started to study…