This week was a weird one. Hot off the heels of our demo, I was pretty motivated to work on some more of my implementation, and since the software stuff is mostly done, that meant building out some SystemVerilog (finally). However, there was a more pressing matter–I flew home for the rest of the semester this past Thursday, so we needed to ensure that all our hardware worked before we were all separated. This meant I needed to build a hardware testbench for the display and the encoders. After some fiddling, I managed to get them both working with a Particle Photon (chosen because the Photon is 3.3V, just like our FPGA), and I got a hardware implementation of an SPI interface set up so that I can build out the hardware implementation of this display driver very soon. The goal for next week is to build the hardware display driver and encoder stuff, so we finally have a UI frontend to our synth. 🙂