Weekly Reports

Product Pitch & Final Video

Product Pitch & Final Video

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Digital synthesis is a convenient and powerful way to create and manipulate sounds. Software synthesizers run on a CPU are feature packed, but reliant on a slow and bulky general purpose computer. Hardware synthesizers are faster and more portable, but tend to provide limited control over the sound due to pricey ASICs and analog circuits. The FMPGA is a digital synthesizer built on an FPGA designed to bring software-level functionality to a high performance platform. Using a MIDI keyboard, a…

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Joe’s status report for 12/5

Joe’s status report for 12/5

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This week, I updated the fixed point units/wrote a fixed point inverter, envelope generator, and applicators all in SystemVerilog, and verified all of their functionality against software models. The envelope generator currently has a bug that I believe I have narrowed down to an issue with multiplication, but I had to move on from it temporarily in order to finish out the rest of my parts before the presentation. I have integrated all of these parts into the larger APU…

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Manav’s Status Report for 12/5

Manav’s Status Report for 12/5

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This week, I have been spending the majority of my time ensuring that all of my portion (the midi and audio layers) are fully implemented, tested, and integrate with the rest of the code that is a part of this project. As of right now, based on all the testing that I have done, I can say that everything works in simulation. This consisted of more thoroughly testing the midi decoder, implementing and testing an event packager to turn midi…

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Eric’s Status Report for 11/21

Eric’s Status Report for 11/21

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This week was a weird one. Hot off the heels of our demo, I was pretty motivated to work on some more of my implementation, and since the software stuff is mostly done, that meant building out some SystemVerilog (finally). However, there was a more pressing matter–I flew home for the rest of the semester this past Thursday, so we needed to ensure that all our hardware worked before we were all separated. This meant I needed to build a…

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Manav’s Status Update for 11/21

Manav’s Status Update for 11/21

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This week, I spent a lot of time trying to make sure that I could get the hardware working and get my parts of the product properly synthesized. In terms of going from MIDI keyboard press to usable data packets for the audio processing units, I have almost everything in place. I also ended up writing up the top-level module for our project to connect all the pieces we currently have together. This module currently integrated all the code that I…

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Joe’s status report for 11/21

Joe’s status report for 11/21

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This week, I implemented the hardware description of the wavetable oscillator. To do so, this also required implementing ROM and the fixed-point unit in hardware. All of these transitions went quite smoothly, and the wavetable oscillator has been verified against my software model and they produce identical outputs over hundreds of thousands of clock cycles. I am starting to dip into expected slack weeks this week, but I plan to hopefully get a lot more of the hardware description completed…

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Team status report for 11/14

Team status report for 11/14

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This week, we worked hard to get each of our respective components into something demo-able. Eric was able to show a software simulation of the display. Manav has the entire MIDI layer SystemVerilog code debugged in simulation and was working on transferring it to the FPGA. While he wasn’t able to get this done by the demo, he made a lot of headway learning about how to interface with the GPIO pins on the FPGA. Joe was able to write…

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Joe’s status report for 11/14

Joe’s status report for 11/14

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Sorry this is late 🙁 This week, I got a lot done. All of the code for integrating the APU has been written and mostly debugged. I also started writing the Wavetable oscillator, fixed point unit, and RAM in SystemVerilog. This is the current status for the APU integration: The software APU is able to modulate a signal using Wavetable oscillator and the LFOs. Theoretically, it would be able to use the envelope generators but they aren’t written in fixed…

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Eric’s Status Report for 11/14

Eric’s Status Report for 11/14

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This week, I worked pretty heavily on getting everything ready to demo. This means that the software display interface is finally done! Now, all I have to do is write it to hardware, which (I hope) is not going to be too hard. I don’t know what else to put here, since you guys saw the majority of my work 🙂 This week, I’m focusing on testing all the hardware components with an Arduino. I want to make sure I…

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Manav’s Status Update for 11/14

Manav’s Status Update for 11/14

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This week, I finished up developing the RTL for the MIDI decoder and got a chance to move onto the synthesis portion of this project. Through the use of simulation tests, I know that the MIDI decoder now works properly, and can try to run on the FPGA. I got a chance to create the circuit for the MIDI keyboard and connected it to the FPGA. I also got a chance to setup the FPGA and ran a couple of…

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