Eric’s Status Report for 11/21
This week was a weird one. Hot off the heels of our demo, I was pretty motivated to work on some more of my implementation, and since the software stuff is mostly done, that meant building out some SystemVerilog (finally). However, there was a more pressing matter–I flew home for the rest of the semester this past Thursday, so we needed to ensure that all our hardware worked before we were all separated. This meant I needed to build a…