This week, I didn’t get much done unfortunately. I started work on the applicator applicator software model, and the test bench is on its way but it’s a bit tricky to write because I need to emulate the functionality of all the modulation sources (envelopes, LFOs, wavetables) in SystemVerilog, which isn’t trivial. It might be better to just test this module alone, without the software model. Next week, I really need to figure out what I’m doing with the applicator…
With the Design Report behind us, it feels like we have a solid foundation to deal with a lot of the complexities of our module. Joe has been working hard on the APU, and for the first time, we have a defined goal for how our filters and distortion effects will work. We’re pretty confident that this new level of rigidity for our specification will allow us to build out the hardware without all of the delays over implementation details….
This week, I worked more on the encoder software simulator. This module has to tie in pretty closely with both the settings and display modules, so I’m trying to find a setup that is extensible enough to work in a variety of circumstances, yet well-tuned enough to work with these modules without much fuss. My current plan is as follows: We split the encoders into two modules. The first module takes in the raw data of the encoder, synchronizes it,…
This week I worked on coding more of the MIDI decoder in RTL. This has a few cases that I thought I would need to cover, but actually do not for the purposes of this project, so I am considering just implementing the extent of what I need to and moving on. I also realized the event dispatcher is a lot harder than I initially envisioned it being so, so I spent more time rethinking the specifics of my design before…
This week, I spent most of my time mocking up a python script to create a software version of the sampler and MIDI decoder. This made it easier to identify what I may have been missing in the hardware model of those components. As for the event dispatcher, I have started to create a software version of that way we can evenly distribute the load of the four note polyphony to the APUs. There were a couple of things I had…
Some of the feedback from our presentation showed concern with the size of our project, and we would agree that currently, the biggest risk to our project is time. It’s proving tough to keep up with our schedule. We have already planned for this and have revised our schedule since the proposal to be a bit more realistic while still building in slack to our schedule. Eric has determined that the video layer will require a bit more complexity in…
This week, I worked on a few PRs from Joe, but mostly, I worked on figuring out what our hardware looks like. My first RTL Design is the encoders, so it’s important to make sure I know their exact functionality before doing any spin-off parts, like the display or the settings. I worked a bit on the software and hardware models for the encoders, but mostly, I just made a quick hardware schematic (which involves a few more resistors than…
This week, I implemented the wavetable oscillator in Python. It meets our requirements of <1% deviation in pitch, and can output sawtooth, square waves, and sine waves. I am very happy with it because it was the one component we were nervous about meeting our requirements for, since we didn’t have too much of a basis for deviation in pitch. The model was written very similar to how it would be implemented in hardware, so it should be fairly fast…
After Joe wrote the testbench last week, I refactored it pretty heavily into something that was a little easier to use. Our final UVM-esque environment is something that I’m very proud of–we have cycle-accurate checking now, and we even automatically look up python modules based on the path of their containing file, which is a bit of Python3 that I wasn’t sure was super possible. Next week, I really have to get to work on the encoder stuff, though–I imagine I’ll…
This week, we worked on catching up from the missed time last week. We all are well into designing our respective components. Currently, we don’t have any major risks for the project; we’ve spent a lot of time discussing the oscillator module, because it has turned out to be more complicated than we have planned for.