Ethan’s Status Report for 3/28

Accomplished:
Worked with Charlie to finalize the schematic, then created the layout and the masks for lithography. Then spent 15 hours and went through all fabrication steps to create our first batches of actual devices. The yield rate is around 20%, with two chips of different doping levels on the resistor. 

Progress/Schedule:
We are a little bit off schedule, we expect to have a working first iteration ready to present on Monday, but as it stands, we might have to delay it to Wednesday. Most of my work has concluded, and what is left is just the iterative process of refining our parameters and figuring out what is best.

Upcoming Deliverables:
Measurement should be conducted over next week and we will continue to fabricate more batches until we can finalize on our final deliverable.

Team Status Report for 3/28

Progress:
This week, the team made a major step forward by finalizing the initial oscillator design. Charlie completed and locked the first implementation, which allowed the project to move out of the design-finalization stage and into fabrication, integration, and characterization. In parallel, the supporting NMOS analysis was completed to better organize the distributions of gm​, Id, and Vth​ across device types, patterns, and chips, giving the team stronger backing for the final device and parameter dimension choices. On the fabrication side, Ethan completed fab on Friday, and over the weekend Jim is immediately coordinating with HackerFab personnel to arrange time for initial measurements and to make sure the team is prepared for any measurement-specific details before characterization and iteration begins next week.

Schedule/Updates:
Compared to last week, the team is now in a much stronger position. The biggest bottleneck had been completing the oscillator design, but that has now been resolved, and fabrication has also moved forward, allowing the project to transition from design uncertainty into empirical validation. This means the team’s immediate work is now centered on collecting first measurements, preparing for the interim demo, and using the initial results to guide quick follow-up refinements.

Upcoming Deliverables:
Next week, the team’s main priorities are to complete the first round of characterization, continue preparing and presenting for the interim demo, and use the measured results to guide the next iterations. Ethan plans to use the characterization data to support a v2 design iteration, while Jim will work with Charlie to finalize the demo PCB based on a better empirical understanding of the oscillator’s actual performance. With the initial design complete and fabrication underway, the team is now positioned to move quickly on translating the finished design into measured results.

Jim’s Status Report for 3/28

Accomplished:
This week, I mainly supported the finalization of the oscillator design as Charlie completed and locked the initial implementation. On my end, I did a final round of NMOS data preparation to better organize the distributions of gm​, Id​, and Vth​ across device types, patterns, and chips, which helped provide cleaner support for Charlie’s final parameter selections and also the W/L dimensions for Ethan to fab. On the hardware side, since the core oscillator test PCB work on my end was already completed, I shifted my focus toward planning the demo PCB, including the supporting infrastructure such as regulators, routing, and other connections needed for a working demonstration setup. I also began preparing for next week’s interim demo and coordinated plans for Sunday/Monday measurements (pending Hackerfab personnel availability as they hold the chip and want to participate in measurement process as well) so that we can begin initial characterization as soon as possible.

Progress/Schedule:
I am currently on schedule for my portion of the project. The main blocker from last week was the unfinished oscillator design and the resulting uncertainty around pin assignment, but now that Charlie has finalized the initial design and Ethan has completed fabrication on Friday, that dependency has largely been completed. As a result, I can now move forward on finalizing the oscillator pin layout and integrating the chip-specific details into the PCB work that had previously been waiting on the completed design and fabrication. 

Upcoming Deliverables:
For next week, my main priorities are to carry out the initial measurements and characterization work, finalize the oscillator pin and layout decisions now that the design is complete, and work with Charlie to finish the demo PCB so it can be ordered on time. Since the base test PCB work is already done, the remaining PCB effort is mainly integrating the finalized oscillator design with the additional support circuitry required for the demo platform. In addition, I will continue to help prepare for the interim demo by contributing to the presentation flow, script, and any technical summaries taken from our empirical measurements.

Charlie’ Status Report 3/28

This week was mainly focused on meetings, design planning, and preparing for the next stage of oscillator development. A large portion of the work involved discussing the implementation plan with the team, aligning on the design direction, and confirming the key circuit parameters so that the project could move forward in a more structured way. I also prepared the updated schematic and supporting figures for Ethan’s Thursday review and continued working on the layout. At this stage, the design values were set to R2 = R3 = 7 kohm and C1 = C2 = 100 pF. Based on these values, the estimated oscillation frequency is about 1 MHz, with a half period of approximately 0.48 us from thalf = 0.69RC, corresponding to a total period of about 0.97 us. In addition, we learned the standard layout workflow and design rules required by HackerFab, which is an essential part of the tapeout process. This should help improve efficiency in the coming week. After completing a first version for Ethan’s Thursday discussion, we expect to accelerate the iteration cycle and target a second version by the end of next week.

Charlie’s Status Report for 3/21

I finalized the target oscillator size and operating frequency and worked with Jim to build a preliminary model for the design. Our analysis showed that the loop gain can exceed 1 with positive feedback, with an estimated gmR^2 greater than 1 under the current setup. The current topology uses four resistors, R1 through R4, and two capacitors. At this stage, the capacitors are planned to be implemented off-chip, which will require two additional pads. With gm approximately 0.8, R1 = R4 = 2 k ohm, and a DC current of about 3.1 mA, the circuit is able to start up and sustain oscillation. For next week, we will await for Ethan’s fabrication of the chip, before bring-up the chip for initial measurements and potential characterization.

Ethan’s Status Report for 3/21

Accomplished:
This week, I stayed involved in ongoing design discussions and worked with Charlie on implementation considerations as the oscillator design continued to take shape. My main focus was making sure I am aligned with the design direction and ready to transition into fabrication once the remaining design details are resolved.

Progress/Schedule:
I am currently on schedule for my portion of the project. At this point, my next major task depends on completion of the oscillator design, but aside from that dependency, I am in a good position to move forward quickly.

Upcoming Deliverables:
For next week, I plan to begin fabrication work as soon as the design is fully ready. In the meantime, I will continue staying engaged in team discussions so that I am prepared to support a smooth transition into the next phase.

Team Status Report for 3/21

Progress:
This week, the team made meaningful progress toward locking the oscillator implementation. We now have a concrete schematic to build around, and the key device characterization data needed to support final design decisions has been compiled and reviewed. In particular, the NMOS measurement results were revisited in detail to compare Id​, gm​, and Vth​ across chips and patterns, which helped narrow the device choices and provide Charlie with the information needed to finalize values in the design and pending for fab.

On the hardware side, the testbench PCB design is effectively ready pending final pin assignment from the oscillator schematic. In addition, orders have already been placed for the PLCC28 chip holder and the backup PLCC28 through-hole to DIP-28 adapter to support initial bring-up. As a result, much of the supporting infrastructure for early testing is now in place, and the remaining dependency is primarily the finalization of the oscillator design itself.

Schedule/Updates:
Last week, the team was roughly two weeks behind schedule due to delays in locking the oscillator design. Since then, we have reduced that gap and are now closer to less than one week behind, assuming the design is finalized on Monday as planned. The key improvement is that the project has moved from a characterization and planning stage into a concrete implementation stage, with both the schematic direction and the supporting measurement data now largely in place.

At this point, the main remaining bottleneck is final design finalization and the transition into fabrication. Once the schematic and pin assignments are locked, the team is in a good position to move quickly on the remaining integration and bring-up steps. To continue reducing the schedule delay, the team’s focus is to finalize the design promptly and then execute quickly on the now-unblocked downstream tasks, since much of the supporting data and bring-up planning/infrastructure has already been completed in advance.

Upcoming Deliverables:
Next week, the team’s top priority is to finalize the oscillator design quickly and move into fabrication. Once the design is locked, the immediate next steps are fabrication and continue organizing the initial bring-up flow. Since the chip holder and backup adapter have already been ordered, the initial bring-up path is largely prepared; the team is now mainly waiting on final design completion and fabrication to proceed.

Jim’s Status Report for 3/21

Accomplished:
This week, I spent most of my time revisiting our NMOS measurement dataset after Charlie shared his schematic. I compiled the key device datapoints and graphs needed to support his design decisions, including comparisons of Id, gm​, and Vth​ across patterns and chips so that we could better choose the most appropriate NMOS pattern/chip combination for fabrication and design. This analysis was important for narrowing the device assumptions used in the oscillator design. For a very general overview and summary of the data I was working with closely, this linked figure shows the scatter distribution with IQR of  Id, gm​, and Vth for our decided Chip 19 across the different NMOS.

On the PCB side, I finalized the testbench PCB design framework. I also selected the PLCC28 through-hole socket as the base component for the demo PCB, and I took responsibility for ordering both the PLCC28 chip holder and a backup PLCC28-through-hole to DIP-28 socket for initial bring-up and contingency testing.

Progress/Schedule:
I am currently on schedule for my portion of the project. The main bottleneck on the PCB side is now the final pin assignment, which depends on Charlie finishing the oscillator design. Aside from that dependency, I have completed the main tasks currently on my end and have been able to respond quickly to Charlie’s requests for measurement data and device-level analysis.

Upcoming Deliverables:
For next week, my role is mainly to remain available on an as-needed basis in case Charlie needs any additional measurements, summaries, or device data to support final design decisions. On the PCB side, the test PCB is effectively complete aside from the final pin assignment, so my remaining work there is mostly waiting for that design information before I can finish the chip-specific integration. In parallel, I will also continue thinking through the other supporting components needed for the demo PCB so that I am ready to move once the final design details are locked in. In addition,  I will coordinate with the team to think about the interim demo presentation.

Ethan’s Status Report for 3/14

Accomplished:

Formed a complete process flow on fabublox and optimized it with the help of Jay. Begun the validation of the process, with a few more steps left to have a completed chip.

Progress/Schedule

Most of my development work ends here, all there is left is for me to use the process that I have validated to create our actual device based on Charlie’s design.

Upcoming Deliverables

Finish the last few steps of the validation process and have the rest of the team measure it for more data, especially on high frequency behavior. And hopefully begin fabrication of the actual device as soon as possible.

Charlie’s Status Report for 3/14

This week, I focused on the initial design of the oscillator, including defining the overall architecture, estimating the device sizing, and setting the key performance targets. The current design is aimed at achieving an oscillation frequency in the 50–100 MHz range under a 5 V supply, while keeping the total power consumption below 10 mW and the active core area within approximately 1 mm². I also worked on selecting preliminary transistor dimensions and passive component values to balance frequency stability, output swing, and layout efficiency. Overall, the design specifications and size budget have been established, and the next step will be schematic refinement and simulation-based verification of the oscillator performance.