Team Status Report for 04/25

This week, the team starting tying together the final steps in getting the Waveshaper demo-ready. This included a battery of tests for subsystems and the last steps of integration.

Daniel and Jake worked on MIDI CC commands, cleaning up clocking issues between modules, routing the control systems for the synthesis core (i.e. enabling the user to modify ADSR or filter parameters), keyboard integration, HPS architecture, and performed the I/O latency test.

Shayaan worked on synthesis and a polyphonic demo along with project tooling for more quickly translating system parameters into standard units.

Unit tests:

  • Vocal polyphonic independence.
  • Waveform fidelity.
  • ADSR correctness.
  • Chamberlin variable filter.
  • I/O and FX engine latency.

Objective measurement vs subjective perception was a key takeaway here. The relay method for keyboard control was deemed unacceptably slow. The polyphonic MIDI arbitration procedure was also changed in light of these tests.

Team Status Report for 04/04

This Sunday, the team finalized a functional interim-demo of the WaveShaper that involved end-to-end I/O functionality, oscillators, mixing, and integration with each feature’s component except for the MIDI keyboard which should be on the way soon.

Shayaan worked on the RTL for SVF filters, also wrestling with  the binary-offset encoding confusion in our IP-blocks. Jake worked on the synthesis of the ADSR envelope, ordering a keyboard, and the beginnings of the RTL for effects. Daniel successfully brought up MIDI parsing and system integration. His work result was a demonstration that could take a MIDI file from a host-machine, and play it back with saw-tooth oscillators, whilst showing the youngest notes requisite MIDI information on the DE-10’s seven-segment display in hex.

With the core elements of the subtraction synthesis pipeline at or near completion, what remains is the synthesis of filters, and adding of effects. This will transform the WaveShaper from a set of disconnected digital signal tools to a real interactive instrument.

There were a few setbacks encountered in unifying the pieces which we’re in the process of resolving. Not all components have been modified to support the binary-offset which the DAC requests in producing the output audio stream.

As the final product takes its shape, now is the time to consider both modular and integration tests. Diagnosing issues in each sub-system is much easier when direct focus is applied, and integration often comes with its own difficulties.

There are generally three types of bugs that we will be looking for in the Waveshaper hardware:

  1. Logical. (A fundamental flaw or oversight in the HDL algorithms and circuit designs which break the desired properties. Example: an error-prone frequency modulation algorithm which drifts non-linearly or jumps suddenly.)
  2. Implementation. (An issue in communication between components or hardware bottlenecks breaking system correctness or decreasing system performance. Example: A propagation delay in a MIDI stream reading system which results in lost bytes.)
  3. Subjective. (Something which breaks user expectations or lacks musicality despite technical correctness. Example: two frequencies within a reasonable margin of error of the target but sounding dissonant together due to a mismatch in their ratio.)

(Logic and Implementation may be ambiguous categories. Generally speaking, logic errors are discrepancies between the underlying mathematical functions which drive sound synthesis and the HDL specification. Implementation errors are hardware engineering oversights or mistakes which cause lack of coordination between the components as synthesized. An out-of-spec driver is considered an Implementation error.)

Logical errors for internal components will be caught and addressed by using HDL testbenches for simulation. The oscillators, ADSR envelopes, filters, and FX can all be implemented in MATLAB to provide a reference series of values in a controlled environment. MATLAB references are faster to implement at the cost of being slower to execute than the synthesized logic on an FPGA.

Logic errors for components may also be tested against pre-existing tools. For instance, the Linux command line utility amidi which comes with many distributions of ALSA (a long-standing backend for Linux audio) can be used to compare the parsing of our custom MIDI receiver with a battle-tested one.

Implementation errors will be diagnosed through measurement. There are oscilloscopes in the engineering labs which can measure the frequency of periodic signals and provide ratios between the peek-to-peek range in a signal with a (non-degenerate) envelope and its maximum. Such tests have already been fruitful in finding hardware artifacts in attempting to drive the speaker with discontinuous waves which can be eliminated with imperceptible interpolating stages.

Finally, subjective errors will be suggested by end users attempting to use the WaveShaper. These will be deliberated on, and minor changes to the specifications may be implemented.

Pitch and interval correctness, rhythmic consistency and responsiveness, lack of artifacts, and  waveform consistency are all technical factors which can be tested using an oscilloscope at the audio output. Ease-of-use can be tested in small groups of both experienced and inexperienced users of the WaveShaper.

The software will be tested with Rust unit tests. Importantly, the core library which communicates with the WaveShaper can be tested as a list of API calls.  The GUI interface software is likely too stateful to exhaustively test. As a result, in-the-field bug hunting will be done merely using the software, and an emphasis on robustness and being able to recover to states which are known to be well are critical.

Team Status Report for 03/28

This week, the team has been trying to clean up the SystemVerilog HDL for the WaveShaper core and implement it on the FPGA to demonstrate what it can do.

Shayaan has been working on the filtering and regularizing the oscillators for making all the tones sound more similar. Jake has been adjusting the ADSR envelope, adding additional logic and safeguards to prevent glitching. Daniel has been working on setting up end-to-end I/O on the DE-10 Standard FPGA development board.

This coming week, we hope to have a scaffolding of the WaveShaper to then fill in during the month of April as the period to work on the project comes to a close.

Team Status Report for 3/14

This week, the team continued working on the core modules in Verilog, while also getting the FPGA ready for testing our implementation on hardware.  We’ve got a MIDI controller in the mail as well, which will be all we need to test that the signal propagates through the pipeline correctly.

Daniel began writing wrappers for the Quartus side of our design,  starting on getting the modules we already have to synthesize.  Shayaan began writing MATLAB tests, which will allow for a much faster checking of our work, by virtue of being able to play directly samples generated from MATLAB, without having to go to hardware. This way, we can ensure what we intend to design will sound the way we expect it to. Jake continued working on the ADSR envelope generator, fixing issues as they arose in a test-bench.

Team Status Report for 03/07

This week, the team pushed to freeze the design of, concretely modularize, and begin the implementation for the WaveShaper in time for the semester’s halfway point. 

Daniel finalized the system architecture for the hardware and external I/O. Jake began writing the hardware description for the ADSR envelope in the sound synthesis pipeline. Shayaan began designing and writing the mixing of oscillators. In addition, the team allocated their time towards writing a design report document, organizing system requirements, specifications, and development schedule.

These steps align with the proposed schedule, and the project is progressing smoothly. On that same theme of project management, the unfurling of the SystemVerilog hardware description of the modules in parallel represent a first for the team in implementing a design upon which we all conferred. Hopefully, this is a good trial for team coordination going into the latter half of the project’s development period and receiving feedback on the design report.

Each team member wrote upon the global, cultural, and environment factors and/or implications of the project in their respective weekly report. Jake Tarin wrote about the global factors (Part A), Shayaan Ghandi wrote about the cultural factors (Part B), and Daniel Abujaber wrote about the environment factors (Part C).

Team’s Status Report 2/14

This week we met with Tom Sullivan and Daniel Zhao to discuss our plans. We decided upon the Terasic DE10 FPGA to begin synthesizing and testing our modules ASAP. Shayaan wrote a saw in Verilog, and visualized it in VCS, as detailed by his report. Jake tried something similar with a square of arbitrary duty. Daniel focused on distinguishing between host versus participant in USB I/O communications between the Waveshaper, PC interface, and MIDI controllers. Jake investigated the on-board codec to decide if it’s suitable for our purposes in live audio.

(A) One public safety concern related to our project is excessive sound exposure. Prolonged exposure to sound levels above 85 dB can cause hearing damage. Therefore, if we include headphone peripherals, it is important to ensure that the output does not exceed safe listening thresholds.

Additional safety considerations include proper power regulation, adequate electrical insulation, and thermal management. Any components that could pose even a minor hazard should be properly enclosed or isolated from the user. By prioritizing these safety measures, we aim to ensure that our digital synthesizer remains safe and accessible to all users.

(B) Musical synthesizers do really well to serve social factors, simply because music is an innately social and cultural thing. People both make music together, and go to venues expecting to hear live music. We use music to help create the cultural moment we’re living in, whether we’re playing or just listening. The Waveshaper’s minimal feature set serves on two fronts: first, the musician is forced to be intentional about the sound they’re making, as there aren’t unlimited tools, and second that this robust feature-set allows a broader set of users to access the device. A more streamlined feature-set means the portability increases, and price comes down, because the hardware isn’t bogged down supporting features not every patch will use.
Secondarily, this project serves as an educational tool. Implementing on a dev-board means that there will be verilog to share. A musician needs awareness of the control-path to make music, but it might be useful for an engineer to see a device that is so explicitly tied up with the concept of inter-connected modules. The musical synthesizer is a very externally visible implementation of very ubiquitous design concepts in hardware. This visibility of path makes it a great educational tool perhaps for extendability.

(C) From the get-go, the WaveShaper was set out to meet particular cost criteria. As a project targeting hobbyists and experimentalists, keeping a low economic barrier to entry was a priority in the design process. This goal was not only considered for the choice of on-board components and associated manufacturing expenses but also in how the device would be used once in the hands of the end user. This secondary aspect is twofold. For one, by ensuring that the ports and interfaces were as generic as possible, a variety of peripherals and computing devices can be used. This opens the door to the use of secondhand markets and even so-called “libraries of things” to customize the user experience. Moreover, we aim to leverage the use of an FPGA and its dedicated sound synthesis as an accessibility feature. To achieve the same real-time performance on a general-purpose computing device in software would be much more expensive and would compete with possibly limited compute and I/O bandwidth for graphics, web tutorials, etc. A less powerful desktop PC, laptop, or even a single-board computer like a Raspberry Pi could be used as the interfacing device.

Part A was written by Shayaan Ghandi. Part B was written by Jake Tarin. Part C was written by Daniel Abujaber.

 

Team’s Status Report 02/07

On Monday, February 1st, we presented a final proposal for the complete set of features and scope of The Waveshaper. Having decided what we are building, we shifted focus this week onto the beginnings of a hardware-implementation design.

We met to form consensus on a high-level description of what The WaveShaper is to be in technical terms, specifying HDL modules, finalizing the choices for I/O, and defining the black-box specifications (inputs and outputs) for the individual components and sub-systems of which The WaveShaper shall be comprised. Successful divide-and-conquer team dynamics require each contributor to understand precisely how their own work interfaces with the parts a teammate will design

Specifically, this week we decided:

  1.  To implement on an FPGA development board.
  2.  To sample at 44.1kHz with a 16-bit-depth.
  3.  To use MIDI’s user-defined System Exclusive (SysEx) commands for WaveShaper-specific communication.

These questions will lead the design process over the next week:

  1.  Which FPGA development board to use?
  2. How can we best quantify the signal bandwidth requirements in terms of FPGA area, speed, and extended features?
  3. What memory solution is best for our requirements?

 

Of possible interest is the more specific block diagram we made in our first all-hands meeting after the proposal presentation.