This week, I worked on several things. The first thing I did was help Grace prepare the group presentation given on Monday (2/22). We worked on and finalized the PowerPoint slides together as a group, and then individually reviewed a sample practice video that Grace put together of her running through the presentation. After the presentation was done, I focused my work back on researching specifics of our design, specifically the FPGA and how we were going to get video output working. Our current plan is to use the VGA output of an FPGA to display to a TV screen with an output resolution of 720p to maintain a sharp image at all times. However, we have two problems we have identified we may run into with this. The first is to do with the pixel clock. A 1280×720 image running at 60Hz requires a pixel clock of approximately 75MHz, which is high enough of a clock that we would likely need to implement PLLs to generate a faster clock to drive the display. Additionally, a single frame at 720p requires a 3MB frame buffer, which may exceed the amount of onboard memory available to us on the FPGA.
To resolve this, I have been researching fallback plans to increase visual quality in the event we have to settle for a lower resolution such as 480p. Our first plan to mitigate this is to have a robust sharpening filter, which is part of our current plan for one of the image filters inside the FPGA’s ISP. However, even with a strong sharpening filter, the outputted image would still be 480p. One way to get around this is to use a VGA to HDMI adapter, and then run the image through an HDMI upscaler. This has the benefit of shortening our VGA cable length (long cables can introduce noise into the analog signal), while dramatically boosting visual quality with the upscaler as many of these use advanced post-processing to increase quality along with resolution (versus simply stretching a 480p image to 720p or higher). One such product I have found is the Marseille mClassic (originally designed for boosting visual quality from game consoles), which reviews claim can take a 480p source to near-1080p quality (see photo below from the mClassic website).
Into next week, I plan to continue researching how we can get a high-resolution feed out of an FPGA and the potential of these fallback solutions, as well as selecting a specific board that we can begin development on. This mirrors our current work plan for this upcoming week (research), and will keep us on track for success in our project.
