This week, I focused mainly on completing our proposal presentation and getting a better understanding of the memory and peripheral portion of our PC/XT recreation. On my individual portion, I started planning the memory subsystem, including how the BIOS ROM and system RAM will connect to the custom 8088 processor and how address decoding will determine which component responds to a CPU request. I also looked into the peripherals I will be responsible for, including video, keyboard, timer logic, interrupts, and microSD-backed storage, and started thinking through how these pieces will connect to the CPU bus. I began outlining the memory map and the interfaces between the CPU, RAM, ROM, and peripherals so that the different components can be developed independently and integrated later. I also started planning how I will verify the memory system, including RAM read/write tests, ROM initialization checks, and address-decoding tests before integrating it with the CPU. My progress is currently on schedule, and next week I plan to finalize the CPU/memory interface with Josh, define the initial memory map, and begin implementing and testing basic RAM and ROM modules before moving on to the storage and peripheral interfaces.
Diagram generated with Chat GPT