This week I updated the BIOS to support Ben’s disk-controller interface. I added a selectable storage backend that handles sector reads, address translation, controller errors and timeouts, and built a separate ROM for hardware integration. I also wrote a controller model and disk diagnostic to test the actual BIOS and bootloader against this interface. These changes are pushed to GitHub.
Validation passed 32 emulator/model test profiles and 28 host tests, including successful reads, error recovery and timeout handling. I updated the dependent software branches and verified that fresh builds from all 15 branches produced the same hardware-facing ROM. This also caught a build-directory issue, which I fixed. The test record documents the results. Physical SD access and FPGA boot remain unverified. I also prepared an interim-demo plan and parts budget.
The shell and COM demonstration remain working in the emulator. My BIOS screen-query and timer work is behind last week’s plan because I prioritized the storage-interface mismatch. To catch up, I will focus on the common screen queries and timer diagnostic while preparing the ROM and disk tests for team integration. Optional EXE work remains deferred.
Next week I plan to add and test the BIOS screen queries and basic timer services, provide the hardware-facing ROM and disk diagnostic to the team, and rehearse the interactive shell/COM demonstration for the interim demo. Full hardware boot still depends on integration with the custom CPU, storage transport and peripherals.