Category: Adam’s Status Reports

BARI BOX ASSEMBLY: This week, I used a hand drill to widen some of the critical mounting holes in the BARI Box, allowing it to be fully assembled for the first time.

AUDIO DEBUGGING: I also continued to work with Xingran to debug the noise issues with the BARI audio channels. Please refer to the #d0-bari channel in Slack, where I gave a full report on our findings and what is / is not possible going forward. In short, we’ve found a difficult-to-mitigate noise source due to power rail noise injection from the BM83. Several mitigation strategies are possible to make the BARI concept functional in the long term, but it’s not possible to implement these strategies with the time and resources available to us.

Unfortunately, due to contact with a person who tested positive for COVID-19, I have been instructed to quarantine and remain away from campus. This will make it difficult for me to assist with the production of the final video demo, but I plan to help out with editing and compiling the written report in the next few days.

REV 2 BUILD & PRE-AMP CHARACTERIZATION: This week, I partially assembled our newly-arrived Rev 2 boards, building out a complete pre-amp channel. This allowed me to finally characterize the BARI pre-amp for gain flatness and THD, though the limited test equipment available prevented me from characterizing it to a high degree of precision. For details, see the final presentation slides to be presented on Mon/Weds.

A representative curve can be seen below, demonstrating the input and output signals and spectra for a ~200 mV, 1 kHz signal. A Blackman window is used, improving the spectrum dynamic range as compared to last week.

I am currently working with Xingran to debug sources of noise in the analog/digital domains and devise appropriate mitigation strategies. This work will continue through the next week, in parallel to other integration efforts.

BARI BOX: This past week, I finalized the CAD for the BARI BOX and had it 3-D printed at TechSpark. The partially-assembled box is shown below. There were a few glitches in the manufacturing process, namely defacing of the surface finish and some poor tolerances in the mounting holes which will require drilling for further assembly, but overall this box is sufficient to serve as a mockup case for our design.

REV 2 MANUFACTURING: Components for BARI Rev 2 began to arrive this week, kick-starting my manufacturing of the new boards. My progress on the first Rev 2 board is shown below: I’ve assembled most of the pre-amplifier and analog effect stages, with the UI, ADC, and microprocessor to come next week as the necessary components arrive. The BM83 for this board was resoldered from a Rev 1 board due to the global chip shortage preventing us from obtaining a new device. The shielding case was dislodged during the resoldering process, and further testing is required to ensure the SoC remains functional.

PRE-AMP VERIFICATION: Finally, the new and more easily-solderable amplifiers arrived with Rev 2, and by retrofitting one of them onto a Rev 1 board, I was able to verify clean audio amplification on that Rev 1 board, as shown below:

Assuming that I receive the parts I need for next week, my goals are to finish the Rev 2 manufacturing quickly enough to help my teammates get the software of our device finished.

 

REV 2 FABRICATION: As we continue the process of bringing up the Rev 1 PCB and developing appropriate software, I am recording errata to inform the updates that will become the Rev 2 board. So far the only major errata is a mis-connection of one of the LCD pins which incorrectly sets the mode to serial instead of parallel. The target to finalize the Rev 2 design was 4/9/2021, but we pushed it back to the middle of the upcoming week to allow more time for verification on the Rev 1 hardware. Due to the overall excellent performance of the two Rev 1 boards, this should not significantly impact our schedule.

REV 1 BRINGUP: This week, I played a major role in supporting the bringup of the remaining peripherals on Rev 1. I helped Xingran to properly set up and communicate with the ADC, and I helped Sam properly set up and communicate with the LCD screen. At this point, essentially all of the peripherals are functional; the only somewhat undetermined element on the critical path is communication with / programming the BM83, but new programming hardware should allow us to resolve this shortly.

In the coming week, I will continue to assist with hardware bringup and simultaneously complete the mechanical design for the “BARI BOX”.

Working on the LCD with Sam:

REV 1 ASSEMBLY: This week most of my time was focused on Rev 1 hardware assembly in order to get working boards into the hands of my team members as quickly as possible. We decided that the new board (named “Alexey”) with the additional passive components we ordered from Digikey last week would go to Xingran while Sam would get the old board (named “Bernice”) which is still capable of running the UI modules.

By the end of the day on Thursday, I delivered both Alexey and Bernice, as well as a rotary encoder for Sam to test UI code and a power switch. A small amount of work still needs to be done on Alexey to fully implement the Analog Overdrive module, but since this is of secondary importance, we decided to put that off in favor of getting a prototype with a working ADC.

BARI BOX: Meanwhile, I continue to work on the mechanical design for BARI’s enclosure. At present, I can estimate that the cost for 3D printing + fasteners will be on the order of $50 (half of what we budgeted), though I am working on ways to make it lighter and thus cheaper.

I don’t have any good photos this week, so enjoy the remaining parts spread across the floor of my apartment:

And a close up of one of the unfinished boards:

And a suggestive, soft-focus close up for the fans out there 😉

My major tasks this week included:

REV 1 PCB BRINGUP: Our PCB boards for Rev 1 (pictured below) arrived Tuesday, and the components to populate them arrived mid-day Wednesday. Before the arrival of these parts, I compiled a several page PCB Bringup Procedure (part of the larger BARI Test Procedure) to describe the final electrical manufacturing and test of these boards. After the parts arrived, this document guided me as I assembled our first testboard (“Bernice”) and worked with Xingran to validate different sub-sections of the design.

Two significant setbacks occurred in this process: First, JLCPCB failed to populate many of the SMD passives on our board. (They have since offered a refund for those components.) Second, I made a series of soldering mistakes that rendered Bernice’s ADC unusable. Nevertheless, we managed to bring up the STM32 microprocessor, communicate on the I2C bus, and verify that the BM83 is functional.

BARI BOX: Simultaneously, I started the design of the BARI BOX, the mechanical enclosure which will enclose the BARI PCB and provide a mounting place for all of its components. I will refrain from posting an image of the WiP BARI BOX so as to not spoil the surprise ~~~

In response to the glitches above, I’ve formulated a revised hardware plan that calls for creating a second Rev 1 (“Alexey”) in the coming week, using newly-ordered components and revised soldering procedures. Rev 2 fabrication will be somewhat delayed relative to our schedule to allow for sufficient testing on Alexey. My current target is to order the Rev 2 boards by 4/8 (and receive them by 4/18).

REV 1 PCB ORDER: As planned from the previous week’s status update, I completed the Rev 1 PCB layout this week and placed an order to have it fabricated. This consumed the majority of my time.

After some negotiation with PCB fabs, I elected to switch from PCBWAY to JLCPCB because of the high cost ($200) and lead time (>25 days) offered by PCBWAY in comparison to JLCPCB (< $50 and ~ 1 week). The significant trade-off was that JLCPCB only stocks a subset of the components we need, so I will have to do additional hand assembly at TechSpark later in the semester. Even including this hurdle, JLCPCB still compares favorably to PCBWAY.

With help from Sam, I also placed a Digikey order for all of the on-chip and off-chip components that will be needed to fabricate Rev 1. Our target remains to receive the board during the week of 3/22/2021.

The final board layout is shown below. Overall dimensions are 2.6″ by 3.8″.

DESIGN REVIEW PRESENTATION: I delivered the design review presentation on the behalf of our group. I created an updated hardware block diagram (shown below) to represent our revised hardware flow, and worked with Sam and Xingran to fairly present the items which they are working on. I received overall positive feedback. The one item of concern was the risk associated with our PCB and integration. However, I believe that we have responsibly mitigated this risk through our accelerated Rev 1 schedule and the time it leaves for integration in late March – early May.

During the coming week, I will take the lead on preparing our design report as my teammates focus on other technical areas of the project, while also beginning the mechanical design, as planned in our master schedule.

REV 1 SCHEMATICS: I completed the schematics for Rev 1 and sent them out for review on Monday (3/1/2021). The response from our reviewers (our TA and advisor) was mostly positive, but our TA identified a new ADC component which could offer superior performance over our existing solution, which led me to redesign the input stage with input from my teammates and our advisor on Thursday/Friday. The new input stage features a 4-channel audio ADC which communicates with the microprocessor on SPI and a new audio-class amplifier for the preamp block.

REV 1 LAYOUT: In parallel with the above, I began laying out the Rev 1 PCB board. Rev 1 is a mixed signal board including both audio and RF signal paths, as well as moderate-frequency digital signals, necessitating care in layout.

As can be seen in the image above, I’ve finished internal layout for most of the main blocks, including the Analog Effect, LCD bus, and BM83. Most of the Power Module and part of the UI module remains to be routed, but I expect that I am close to completion because the routing for these remaining components is less complex than what I have done so far.

DESIGN REVIEW PRESENTATION: I will be delivering the design presentation next week, so I have been working together with my teammates to create the slides and understand the content I need to present, which includes substantial work that was not done by me. We plan to hold a dry run presentation on Sunday before the slides are due.

I had previously hoped to finish the layout and order the board by the end of this weekend. However, due to the late redesign with the ADC, it seems more realistic to let this deadline slip by a few days and order the PCB before Wednesday. Finishing the layout and all of the associated tasks necessary to order this PCB will be the main focus of my effort in this coming week, along with participating in the design review process. Overall impact of this change on our project schedule should be minimal.

ANALOG EFFECT: This week, I completed the Analog Effect circuit (a 3V3 clone of the Colorsound Overdriver). By importing WAV files into SPICE, I was able to verify that the circuit produced the intended modulation effects, and was not functionally affected by my revisions to make it 3V3 compatible. This gave me the confidence I needed to implement the circuit using real hardware in the Rev 1 Schematics.

REV 1 SCHEMATICS: As planned, I spent the majority of my time this week on the schematics for our Rev 1 board, a near-complete prototype of our project hardware which has fewer audio channels but contains all of the necessary peripherals. I have sourced essentially every component in the design, and I am filling out a BoM for delivery to PCBWAY in conjunction with the schematics.

Currently, the schematics are approximately 90% complete, pending feedback from my teammates and a few small changes. The plan is to complete the schematics in the next few days, followed by a design review with our TA / advisor. At that point, I can begin laying out the PCB with a goal of sending it out for manufacturing by around the end of the coming week. This will enable us to verify our software on actual hardware.

In the coming week, I will also be preparing to give the Design Review presentation, which is my designated presentation to give.

90%-completed schematics are attached to this update.

Rev 1 Schematics V0.9 WIP

The portions of the project for which I am responsible remain on track or ahead of schedule. The objectives I focused on this week include:

PROJECT TEST PLAN: I wrote the BARI Test Procedure document, outlining a set of ten quantitative tests that we will perform at various points throughout our project to verify System Requirements. In my section of the proposal slides (metrics and testability), I linked these tests to the System Requirements they verify. Most tests remain as outlines, but several are fully written out with instructions for recording results.

PRE-AMPLIFIER: I have selected an overall topology as well as specific components for the BARI pre-amplifier functional block. Through the use of a switched gain block and attenuator, the pre-amplifier will achieve tunable gain to within +/- 1 dB across a 70 dB range. See Slide 8 of the Proposal Slides.

ANALOG EFFECT: Sam helped me downselect to the “Colorsound Overdrive” pedal, an analog effect that is only available in expensive pedals and will be an excellent selling point for our product. We have reference schematics from several sources for the Colorsound, but it’s my responsibility to (1) Verify the correctness of these schematics and create a Reference Overdrive Pedal model in SPICE, and (2) redesign the circuit to function at 3V3. (The original circuit runs from 9V.) As of right now, I’ve subdivided the Colorsound Overdrive into three stage (fuzz face, tone stack, and output amplifier), and I’ve created both 9V and 3V3 versions of the fuzz face stage.

REV 1 SCHEMATICS: This weekend I am beginning to work on schematics for our Rev 1 circuit board, which should be a fully functional prototype of the system. I have an aggressive deadline to complete these schematics in time for a schematic review on 3/1.

In the coming week, I plan to focus entirely on finishing my redesign for the Analog Effect and finishing the Rev 1 Schematics. This will also enable me to help the team create power and fiscal budgets, since the Rev 1 (and Rev 2, if necessary) boards will be a large part of those budgets.