Category: Team Status Reports

This is the last FP-GAme status report. We have finished our project goals and are looking forward to Thursday’s demo.

Weekly Progress Summary:

Joseph finished documenting the project and creating the public repositories.

Andrew finished his emulator port enough to show off a few games at the public demo. We are planning to livestream the gameplay over Zoom (or something with smoother video if we can find it, and then provide a link).

Remaining Tasks:

On Sunday (tomorrow):

• Finish final video

Next week:

• Public demo thursday

• Finish final report (unless it is done sooner)

Andrew finished the Sprite-Engine, the last major hardware component. Hardware is pretty much finished at this point.

Joseph finished the PPU User Library. The User Library now has all necessary components to allow the user to easily operate the hardware. A tech demo was built off of this library and will be ready to show in the final demo and/or presentation.

Andrew has also recorded a short video displaying some of our most recent progress (the working sprite engine, tile engine, pieces of the NES emulator port, etc). That is available here: https://www.youtube.com/watch?v=Susc9KNKaJI

Next week:

• Joseph will be working on user documentation, creating the public-facing repositories, and other remaining user-focused tasks.
• Andrew will be working on porting his NES emulator to run on FP-GAme. This will enable us to demo games (albeit with some limitations due to not being an NES).
• Final presentation!
• Work on the final poster and video.

We are entering the last few weeks of the project and we have made some significant progress so far. We only have a few tasks remaining. Instead of providing a Gantt Chart, we’ve condensed our remaining tasks into a small list.

Next week:

• Joseph finalizes PPU User Library and gets started on the Demo Game.
• Andrew works on Sprite Engine. We meet on the weekend to verify it works with our user library.

After this, the hardware and software components of the FP-GAme console are finished. There are only a few user-experience tasks to accomplish.

Things we want to do for the user experience:

• Finalize an SD Card image with FPGA program file and Kernel modules.
• Write an instructions document for modding an SNES Controller extension cable to work with FP-GAme GPIO.
• High-level guide to FP-GAme (FP-GAme user manual).

For next week, we also have some course-related work to accomplish. In particular, we will need to work throughout the week on the final presentation.

This week’s tasks included APU implementation, PPU bug-fixing, and redesign of the PPU-CPU communication.

For context on the PPU-CPU communication redesign, a team design-review meeting was held last Saturday, which resulted in a redesign to the PPU-CPU communication. During the design phase, Joseph and Andrew had differing ideas on how the PPU-CPU communication and eventual PPU driver should work. Joseph wrote his design in the design review report: The CPU sends video data to the PPU over the AXI BUS accessible via MMIO, following strict timings. However, last weekend the team decided to switch to Andrew’s design: The CPU sends an address to the PPU, which the PPU then uses to DMA-copy video data stored in SDRAM. The main benefits of this include less coupled timings between the CPU and PPU, as well as more intuitive PPU software (with a lot of reusable code from the APU kernel module). Joseph will be implementing this next week, so some scheduling changes needed to be made.

Here are the scheduling changes and brief reasons for their occurrence:

• Moved task the “Row Buffers, VRAMs, CPU->VRAM Interface”. Joseph needed to modify the designs of the CPU-Facing VRAM Interface to be more compatible with the SDRAM. This task is mostly done, but needs to be verified along with the SDRAM DMA next week.
• Added a new task for implementing PPU-SDRAM DMA. The goal is to accomplish this next week.
• Joseph used 1 Slack Time for the Tile-Engine Implementation. Tile-Engine was difficult, and required setup and debug of a few other interdependent systems.
• Created a new APU bug task. Andrew will be working on this next week.

• Slack time for CPU used in advance for Implement Full Test Game. Required due to push back on APU timeline.
• Sprite Engine also pushed back to week of 4/19.

  Project Schedule Gantt Chart – 4-10-2021

We’re in a slightly better spot than we were last week, as we made a lot of progress this week. We’re both optimistic about the future. As we’d currently consider ourselves roughly 2 days behind the schedule from last week, there are no official scheduling changes.

By the end of next week, we should have the controller and audio modules fully finished and most of a working hardware implementation for the PPU. A video and audio demo will also be prepared for the interim demo.

We are behind, lord help us, we are behind.

 

Since our last status report on the 13th, we have completed a significant portion of the video implementation, with only the Pixel-Engines (Tile and Sprite Engine) and Software PPU-Driver remaining. More details are included in Joseph’s status report for video. We are running into difficulties building Kernel Drivers needed for Input (and later PPU and APU). Andrew discusses these details in his status report.

 

We are planning on meeting Wednesday 31st to decide on the allocation of critical tasks (Sprite Engine and Remaining Audio Implementation). In the time between this status report and Wednesday, Joseph will attempt to finish the Tile-Engine, and Andrew will attempt to finish the Kernel Module for Input and the Audio Implementation.

 

Our new schedule can be found in the following link:

http://course.ece.cmu.edu/~ece500/projects/s21-teamc1/wp-content/uploads/sites/133/2021/03/Project-Schedule-Gantt-Chart-3-27-2021.pdf

 

The scheduling changes are summarized below:

• Pixel-Engine tasks were combined and pushed back a week. In their place is a PPU FSM implementation task. These changes were necessary given the additions to the design made in the Design Review Report.

• Pushed back PPU Driver to after the Interim Demo. Joseph is going to be focused on implementing a user-space video demo instead.
• A new Video Demo task has been added to clarify what Joseph will be doing during the week of the Interim Demo.
• Pushed Audio Implementation to week of 29th. Andrew will be attempting to complete this before the Wednesday Lab.

This week was system bring-up week. Our goal was to get Controller Input, HDMI Video, and Linux running and communicating with each other. Additionally, this would include setup of our development environment, including Quartus, Platform Designer (Qsys), and arm-none-linux-gnueabihf.

 

Out of these goals, only Controller-Input and Linux can talk to each other. HDMI Video has been tested via a demo 2 weeks ago, but the PPU and System-Interconnect design itself isn’t finalized yet, so Linux cannot control the PPU and HDMI output yet. Specifically, this requires DRAM-fetch (Joseph’s task for this week) and Tile-Engine (Joseph’s task for next week) to be completed first.

 

The results of Joseph’s DRAM latency research forced us to come to the conclusion that our original idea of using DRAM as our VRAM was infeasible. The risk of the PPU repeatedly missing pixels turned out to be much larger than we had anticipated. As such, we have slightly reorganized our internal design for the PPU in a way that won’t require us to change the MMIO interface but will still allow us to use the vast majority of our design as we originally specified it. Under the new design, the memory locations specified by MMIO will instead be transferred to an internal VRAM buffer at the beginning of each frame. The VRAM will be implemented in M10K, which we can access once per cycle. At the start of each VBLANK, the VRAM buffer will be committed to actual VRAM, which the PPU will then render from.

 

There are no schedule changes this week.

This week, we mainly focused on the interfaces between our modules and their internal structure in preparation for the design review. We defined what the MMIO interface will look like for our project, though the syscall interface is still a work in progress. We also generated block diagrams for all of the FPGA components of our system.

We’ve also made some major shifts in the general structure of our project. In particular, we will no longer be building a custom kernel for our FPGA. This decision was made for a few reasons. First, it negates a significant amount of risk involved in bringing up our system, as creating the kernel ourselves would have pushed back a large amount of testing. Second, it removes a large burden from us, and gives us time to create a full game to demo the functionality of our system. Finally, it allows us to easily provide the user with the full C standard. Note that this decision means our system call interface is actually now a kernel module interface.

Finally, in light of these changes and what actually was accomplished this week, our schedule has been drastically changed. The details of these changes are below. Under these new changes, we’re right on schedule and expect to be able to maintain this schedule without causing excess stress for either of us.

Schedule Changes:

• Removed Kernel-related tasks from Schedule. We intend to use a customizable Linux kernel instead.
• Added CPU task for development of the test game before interim demo.
• Removed PPU tasks for foreground scrolling and layering for foreground and sprites. The foreground tile engine is a copy-paste of the background tile engine. Layering will be accomplished with the sprite engine implementation.
• Added another task to the PPU called DRAM Tile Fetch. This task will consist of implementing the Avalon MM Master on the PPU side to fetch tile data from DRAM.
• Moved back input-related tasks. Andrew made good progress this week and we should be able to complete it earlier now.
• Pushed back audio tasks by two weeks to make room for input tasks.
• Pushed back implementation deadline of the PPU driver to until after the main PPU tasks are finished. Realistically, the PPU driver will be worked on in parallel with all of the PPU tasks for testing purposes.

Our updated Gantt Chart schedule can be found below:
http://course.ece.cmu.edu/~ece500/projects/s21-teamc1/wp-content/uploads/sites/133/2021/03/Project-Schedule-Gantt-Chart-Updated-3-6-2021.pdf

Our MMIO notes from Wednesday have been uploaded below:
http://course.ece.cmu.edu/~ece500/projects/s21-teamc1/wp-content/uploads/sites/133/2021/03/Communications-Updated-3-6-21.pdf

Our PPU diagram from Saturday:

This week, we worked on our project proposal presentation and began working on a design for the implementation of our project. We decided to use the DE10-Nano to implement our console for several reasons:

• It offers HDMI output, simplifying the implementation of sound generation and ensuring that video will be compatible with more devices.
• It uses a Cyclone V FPGA, which includes an ARM core, meaning we don’t need to dedicate as much time to the communication between modules.
• It has a large amount of ram and an SD card port, which the ARM core can boot from, meeting our storage requirements for ram and program storage.
• It has GPIO pins, which will allow us to communicate with older video game controllers easily.

 

Additionally, we performed individual research into the design and implementation of our project. Due to an error in our schedule and several facts coming to light during our research, we had to rearrange our schedule a little. Overall, the project is slightly behind schedule, but expected to be back on schedule by the end of next week. Andy was unable to finish a design for the audio interface, but expects to have it done soon. Joseph was unable to complete the design for the PPU interface, but also expects to finish it quickly.

 

Schedule Changes:

• Moved design presentations back a week. That was an error in our initial scheduling.
• Moved system call design back a week, to fix the same error.
• Joseph: Swapped the PPU interface design and HDMI tasks. Designing the PPU interface will be for next week (Mar. 1st).
• Andy: APU interface design moved back a week (he’s behind schedule).
• Andy: Input implementation moved back a week, as design time revealed that no more time would be needed and this allowed slack to be added to sprite engine implementation.

 

Our updated Gantt Chart schedule can be found below:

http://course.ece.cmu.edu/~ece500/projects/s21-teamc1/wp-content/uploads/sites/133/2021/02/Project-Schedule-Gantt-Chart-Updated-2-27-2021.pdf

Hello and welcome to our first team post!

This past week, we worked on nailing down our design requirements and scaling back our design to something which can be met within our time limit. The main changes in this area are to the Pixel Processing Unit (PPU) and Audio Processing Unit (APU).

For the APU, we now intend to implement something very similar to that of the Game Boy Advance (GBA), which merely offers buffered 8-bit samples to two DACs. We currently intend to provide mono output for this sound. This is simpler than designing several wave generators and an interface to manage them, while also giving our users more freedom in the sounds they can create using our console.

For the PPU, we decided that instead of implementing a subset of what the GBA offers we will instead design something new from the ground up. This gives us the freedom to meet our requirements in a way which is efficient for our time, and ensures that we can adjust the design to meet the requirements of the rest of our system. For example, we may require increased sprite size capabilities, compared to the GBA, as our display is larger.

Our requirements document (updated 2/20/21) can be found here:
http://course.ece.cmu.edu/~ece500/projects/s21-teamc1/wp-content/uploads/sites/133/2021/02/FP-GAme-Requirements-2-20-21.pdf