Progress

Eric and I worked together on writing the Python simulation of the tiles (representing a tile’s sides, connections between its neighbors, clocks, etc). Then, after establishing the communication protocol with Eric, I began working on writing the actual firmware logic in Python to test our embedded logic. So far, I have some aspects of the state machine logic for what each tile’s side should do during a falling and rising edge of the clock, and what they should do during certain bits of a word. I also hope to use semi-Test Driven Development with this Python embedded code. I have begun to write unit tests to test small aspects of the code and logic.

As I’m writing the Python code, I’m beginning to see the value of simulating the tiles and firmware in Python before moving on to the actual Atmega environment. I stumbled upon a few holes and missing parts of our logic, and I’m glad that I’m discovering them now.

Current progress can be found under “tileFirmware.py” and “tileFirmwareSimulator.py” of our repository: https://github.com/melodeeli98/codeblox-capstone

Schedule

The logic isn’t code-complete yet, but I’m still pretty on schedule with this part of the project; I still have a week to complete it.

Goals for next week:

• Complete the Python firmware code.
• Test the code as rigorously as possible.