Here is a link to the project statement in PDF format: PDF

The list of suggested project topics can be found in this document: DOC.

You can also go through some recent papers in the top computer architecture conference. Here are the links to some of the major conferences in the field:

• ISCA
• ASPLOS
• Micro
• HPCA

Names: Rachata Ausavarungnirun, Tao Yang, Thomas Tzou
Title: Dynamic Page Migration Algorithm for DRAM/PCM Hybrid Memory System
Points of Contact: 1st=Vivek, 2nd=Lavanya

Names: Anoop Ramakrishna, Kartikeya Goyal, Tejas Chopra
Title: Cost-Benefit Analysis of thread Scheduling Algorithms on ACMP
Points of Contact: 1st=Lavanya, 2nd=Evangelos

Names: Berkin Akin, Qiuling Zhu, Huseyin Ekin Sumbul
Title: Application Specific Logic in Memory
Points of Contact: 1st=Vivek, 2nd=Evangelos

Names: Jason Lee, Matthew Wachs
Title: On-chip interconnects, denial of service, and security
Points of Contact: 1st=Lavanya, 2nd=Evangelos

Names: Wolfgang Richter, Ekaterina Taralova, Karl Naden
Title: LightSpeed: A Many-Core Scheduling Algorithm
Points of Contact: 1st=Vivek, 2nd=Evangelos

Names: Tao Cui, U Kang, Ligia Nistor
Title: Advanced caching methods for graph mining algorithms
Points of Contact: 1st=Evangelos, 2nd=Vivek

Names: Jeremiah Blocki, Erik Zawadzki, Yuan Zhou
Title: Regret Minimizing Branch Prediction
Points of Contact: 1st=Vivek, 2nd=Lavanya

Names: Shun-Ping Chiu, Heng-Tze Cheng, Song Zhao
Title: DATM: Data-Locality Aware Thread Migration
Points of Contact: 1st=Lavanya, 2nd=Evangelos

Names: Gennady Pekhimenko, Danai Koutra, Kun Qian
Title: Approximate computing: application analysis and microarchitecture design
Points of Contact: 1st=Evangelos, 2nd=Vivek

Names: Jin Kyu Kim, Seunghak Lee
Title: Hardware VM with DRAM and NAND Flash Memory
Points of Contact: 1st=Vivek, 2nd=Lavanya

Names: Dan Burrows, Kevin Kai-Wei Chang, Eric Rippey
Title: Adding Buffers to Bufferless On-chip Networks
Points of Contact: 1st=Lavanya, 2nd=Vivek, 3rd=Chris Fallin

Names: Nikhil Jagdale, Karan Khanna, Aman Kumar
Title: Power and energy analysis of different pre-fetching mechanisms for linked data structures
Points of Contact: 1st=Evangelos, 2nd=Vivek

Names: HanBin Yoon, Justin Meza, Rachael Harding
Title: Hybrid Memory in Multi-Core Architectures
Points of Contact: 1st=Vivek, 2nd=Evangelos

Names: Alexey Tumanov, Joshua A. Wise
Title: Tilera ManyCore - Memory Controller Affinity & Execution Placement
Points of Contact: 1st=Lavanya, 2nd=Vivek

Names: Alfred Barnat, Benson Tsai, Javier Novales
Title: Parallel Applications and Multicast for Bufferless Interconnect Networks
Points of Contact: 1st=Evangelos, 2nd=Lavanya, 3rd=Chris Fallin

Names: Bin Fan, Lin Xiao, Prashant Kashinkunti
Title: A Micro-Architecture Level Study of FAWN Architecture
Points of Contact: 1st=Vivek, 2nd=Evangelos

Names: apandya,cgopal,mdharkar
Title: “SYNERGY” – A SHARED RESOURCE AWARE PRIORITIZATION ALGORITHM FOR CHIP MULTIPROCESSORS
Points of Contact: 1st=Lavanya, 2nd=Vivek

Names: Wei Lin, Yu Wang, Daniel Lin
Title: Concurrent Critical Section Access Acceleration: a Hybrid System of Speculative Lock Elision and Asymmetric CMP architectures
Points of Contact: 1st=Evangelos, 2nd=Lavanya

Names: Rohit Banerjee, Tim Detwiler, Alekh Vaidya
Title: Task-Aware Scheduling for Multi-Core Memory Interconnect
Points of Contact: 1st=Evangelos, 2nd=Lavanya

To discuss about project topics with your fellow graduate students and look for project partners visit the following page: Project_Discussion.
You have to register first (create an account on the wiki for yourself).