Jared’s Status Report for Apr 11

After meeting with a professor, I have determined that the SPI clock cannot run as fast as I expected. However, SPI is still the fastest method to transfer data.

What has changed is that the SPI clock will run at 15.6 MHz, or 250MHz / 16. This means that the 50MHz FPGA clock can successfully process the SPI clock without relying on a separate clock. I still have to code this, but it will be done by Monday.

By Friday, I plan to finish all of the SPI bus and spend the weekend completing additional tasks for TJ.

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