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Labs

Lab 1: Instruction Level MIPS Simulator (Due: Fri. 1/23)

Lab 1.5: SystemVerilog Warm-Up (Due: Never)

Lab 2: Single Cycle MIPS (Due: Fri. 2/6)

Lab 3: Pipelining (Due: Fri. 2/20)

Lab 4a: Branch Prediction (Due: Fri. 3/20)

<hi> Lab 4b: TBD (Due: Fri. 3/20) </hi>

Lab 5: Simulating Caches and Branch Prediction (Due: Fri. 4/3)

Lab 6: Memory Hierarchy (Due: Fri. 4/17)

Lab 7: Multicore and Cache Coherence (Due: Fri. 5/1)