Varun’s Status Report for 3/16

What did you personally accomplish this week on the project? Give files or photos that demonstrate your progress. Prove to the reader that you put sufficient effort into the project over the course of the week (12+ hours).

This week was mostly focused on writing the JPEG decoder for the FPGA. I had to rewrite my SPI interface so that it matches the JPEG stream that will be received by the FPGA. Then I was able to write the code for the IDCT conversion that will need to take place. Code and testbenches for this code is attached as screenshots.

Is your progress on schedule or behind? If you are behind, what actions will betaken to catch up to the project schedule?

As of right now, I am on schedule so I’m not worried about my progress.

What deliverables do you hope to complete in the next week?

The main deliverables for next week are to improve the timing of the JPEG decoder. As it stands it rans at about 100Mhz on the FPGA, and ideally it’s closer to 200Mhz. I will work on pipelining the IDCT transform better.

https://drive.google.com/file/d/1DKnRUHdgg2I1rG0Blsez0BALWXh-Vlra/view?usp=sharing

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