Tag: status report

Michelle’s status report for 3/27

Our group started off this week’s discussion by going over my approach for the sine oscillation, and we found out that my original design for creating the look-up tables was not appropriate for our purpose. Specifically, I originally only stored 256 distinct values for a sine wave in the LUT, and since we are aiming for an output frequency of 44.1kHz, we need much more data points than that. So, I started off this week’s work by editing my design and also adding in some other features : (1) volume control (amplitude-scaling of output signal), and (2) accommodations for the scenario where the oscillator has to output a different note after it is enabled.

My code is pushed on this branch. This code has passed simulation tests.

I also started on my work for the second checkpoint, which is to implement the oscillator to output square, triangle, and sawtooth waves. However, I have not finished the simulation tests yet, so I have yet to push them onto Git.

I am a bit behind schedule since I haven’t finished the simulations yet, but I’m not concerned because I’m sure I can finish these in the next few days. However, I am quite concerned about the integration of our project as we are experiencing hardships in hardware interfaces. I will be mostly focusing on solving this part with our team, though it wasn’t planned as part of my checkpoint goals.

Next week, I hope we will be able to resolve our issues with hardware interfaces, and I will be able to finish the simulation test cases for the square, triangle, and sawtooth waves. I will also be starting on my planned goal for the next checkpoint, which is to implement the unison effect.

Jolin’s status report for 3/27/2021

  • I finished coding the polyphony control and I am in the process of debugging the simulation. To make my design more generic (i.e. the number of notes supported at a time is not fixed to 4 but configurable through a parameter), I learned a lot about the generator block in SystemVerilog.
  • My design for the arpeggiator control is naturally divided into two parts. The first part is to store the notes while the arpeggiator key is pressed, and sort them in pitch ascending order. The second part is to play the notes at the desired rate and pattern. This is relatively easy once the first part is set up since it basically uses a counter to determine when a note needs to start and end, where the counter value are calculated based on tempo and rate. Then at each start time, the pattern and mode determine whether a rest or a note will be played, and which note will be played.

I am a little behind schedule but since I left ample time for polyphony control integration, it will be easy to catch up.

Next week I will finish debugging the polyphony control and start coding the arpeggiator control.

Hongrun’s Status Report for 3/27/21

For the past two weeks I worked on:

  1. Building the MIDI interface circuit. This did not turn out well — as I probed the circuit with an oscilloscope and tested an Arduino script (See Step 10 in the link) to see if it was working. The waveform I got from the scope was very noisy; the Arduino script did not yield any sound to be played as it should. I arrived at the hypothesis that the midi breakout board was broken either on arrival or due to soldering. I ordered another one and tested it — unfortunately, I got the same result. I am having a debug session with my teammates today to see if I can get any progress. If not, we will ask for help from other people.
  2. I wrote the script for the MIDI deserializer+decoder and simulated it successfully.
  3. I wrote the script for interfacing with the audio CODEC on the FPGA. I studied the I2C protocol and the audio CODEC specification. I then found a script online that does a similar job (except it reads data from memory) — I was able to synthesize it and get it to play music from memory on my board. I am still in the progress of integrating this code with Michelle’s sine oscillator.
  4. I wrote the script for the mixer and simulated it.

My progress for this week was mainly blocked by the issues with the physical MIDI interface. I was, therefore, unable to finish 1/3 of my tasks for this week. In order to unblock Jiuling from her checkpoint 2 tasks, I found her a Python script that takes in USB MIDI signals and prints out the MIDI bytes.

My tasks for the next week include:

  1. Developing the ADSR module
  2. Finish ckpt1 integration and get some sounds to play out from the audio CODEC

Michelle’s status report for 3/13/21

  • I practiced and gave the design review presentation.
  • As planned, I worked on setting up my local environment for simulation and synthesis. I have successfully installed and set up ModelSim and Quartus on my PC.
  • My other task this week is to integrate the look-up table for implementing the waveform oscillator for sine waves. For this, I am looking into some of the design details of LUT’s in FPGA’s. My next step is to determine the exact number of data points that we need for producing waveforms that would meet our design requirement.
  • I also worked on the design report that we will turn in next week.

I am on schedule. Next week, I will be implementing the LUT’s and the sine waveform oscillator.

Jolin’s status report for 3/13/2021

  • I now have a fully working simulation and synthesis environment with ModelSim and Quartus, respectively. Making the USB-blaster cable work took me a while since the USB-Blaster on Linux requires some special setup. I spent extra hours debugging the JTAG connection because my laptop’s USB port/USB-A-to-C dongle connection doesn’t work reliably.
  • My random number generator module and testbench now pass simulation. The output is verified against the Matlab script.
  • I learned how to use algorithmic state machine with datapath, or ASMD. It is closer to the actual Verilog code than FSMD.
  • I finished the ASMD of the polyphony control that handles MIDI note messages. This design is sufficient for Ckpt 1 (3/22).

I am on schedule.

Next week I will spend most of the time writing the Design Review Report. I will add control message handling to the polyphony design after Hongrun figures out the list of control messages the MIDI keyboard would generate.

Team status report for 3/13/2021

  • This week, we discussed Prof. Sullivan’s feedback received from the design review presentation and decided to leave the filter as an add-on feature to the end if we have time given this semester is shorter.
  • The most significant risk so far was setting up the synthesis and simulation environment as this is new to all of us and involves installing a Windows system on Mac for two members. Luckily, we have had the setups mostly working and the experience is transferrable, so hopefully by the end of next week all of us can work smoothly.
  • We started writing the design review report.
  • We have set up a project structure that minimizes merge conflict.

Hongrun’s Status Report for 3/13/2021

This week, I did 90% of what I have planned:

  1. I tried to set up a Linux subsystem on my Windows partition to do simulation locally, but that did not quite work out because I could not figure out how to share my files in the Windows system with the Linux subsystem
  2. I resorted to using the ECE virtual machine as my development and simulation environment (with VCS). I hope that although all of us will probably be using different environments (Jiuling will be using ModelSim while Michelle is still deciding), our integration stages will still work out.
  3. As a team, we figured out our GitHub project structure and workflow
  4. I soldered my MIDI breakout board
  5. Started my part of the design report, progress is at 50%

I will catch up on No.5 shortly — hopefully, finish my part this evening.

Next week is a heavily loaded week, but I plan to:

  1. Finish the design report with my teammates
  2. Understand and write up a summary of MIDI specifications to share with my teammates
  3. Finish the MIDI keyboard to FPGA circuit
  4. Draw datapath and FSM for decoding MIDI messages and have my teammates critique them
  5. Finish simulation of the MIDI decoder

Jolin’s status report for 3/6/2021

  • I finished scripting the pseudo-random number generation algorithm with Matlab and System Verilog file generation. The configurable n bit LFSR is able to generate a pseudo-random sequence of length 2^n – 1. It generates a 1-bit number for each clock cycle. With this functionality, the arpeggiator can support random rhythm generation, where each step has a 50% chance of being either a note or a rest.
  • I had a primitive polyphony control design. I will record the current status of each of the four audio processing pipelines – is it in use and by which note. On the key-down event, I will send the note to a free pipeline and mark it in use. If none is free, discard the note. On the key-up event, I will signal the ADSR envelope that the note is released and mark the pipeline as free. Since there are only four pipelines, the scheduling can be as easy as looping until the first free.
  • I studied our MIDI keyboard Launchkey Mini user guide and led the discussion on detailing which effect parameter is user-controlled and by which control on the keyboard. The result is shown in our presentation slide.

The simulation and synthesis environment setup is taking a lot longer than I thought. On the other hand, due to the large project specification change, my timeline has changed a lot and I am able to reschedule my later tasks to account for the difficulty of the environment setup.

Next week I will finish the environment setup and start on a more detailed design for polyphony control.

Michelle status report for 3/6/2021

This week, I am on track with my planned tasks on the Gantt chart. I finished writing the Matlab testing scripts for ADSR and waveform generation. In addition, the entire team met for a total of around 9 hours this week in finalizing our design, drawing the block diagram, and creating the design review presentation. I think this time was very well spent, because I am now able to get a much better grasp on the project. Next week, I plan to start configuring my local system to enable synthesis and simulation, in accordance with our Gantt chart.