Author: hongrunz

Team Status Report for 02/27/2021

The most significant risks and contingency plans are:

  • Unfamiliarity with the SystemVerilog environment and long ramp-up time — get our hands onto the FPGAs as soon as possible and set up the simulation environment together
  • Insufficient time estimated for each task — allotted slack time of 14 days
  • Integration and synthesis could require lots of coordination and time — made integration and synthesis periods into their own tasks so that we account for these events too

As of now, we are just starting to follow our Gantt chart and have not made any changes to the existing system or the schedule.

Hongrun’s Status Report for 02/27/2021

This week I mainly worked on three things:

  1. Gave the proposal presentation on Monday. I reflected on my presentation afterward and had a discussion with my teammates on what was done well and what could be improved.
  2. Listed the Bill of Materials with my teammates. We are in the progress of communicating to our TA and hopefully will place the orders next Tuesday.
  3. Installed Matlab and got familiar with the testing environment and am in the progress of writing my first test script.

My progress is on track as well as that of my teams’ as of now.

Next week, my tasks include:

  1. Finish the two test scripts
  2. Set up my simulation environment
  3. Work on the design report and presentation with my teammates
  4. As materials start to arrive, start on building the MIDI interface for note inputs