This week I did research on HDMI for our project. I specifically wanted to know what protocols/interfaces the PPU needed to support on the video output. Knowing this will help narrow down possibilities for an actual PPU design. For example, we can determine things like signal timings, clock rate, and other constraints that will get us started on designing and testing the Tile Engine and other PPU features.
The DE10-Nano uses an HDMI Transmitter Controller IC called ADV7513. The link below is the datasheet containing the general features and some electrical characteristics for the chip:
https://www.analog.com/media/en/technical-documentation/data-sheets/ADV7513.pdf
I logged my research notes on HDMI in a document. The resources page contains links to the various websites, datasheets, and manuals I used. The version for 2-27-2021 is linked below:
research_PPU_HDMI_2-27-21
To summarize the document:
- There is an HDMI demo for the DE10-Nano which showcases a simple pattern graphics test and simple audio output.
- Interestingly, it shows that we must interface with the ADV7513 using a VGA-like signal protocol (Horizontal Sync, Vertical Sync, Data Enable, 24 bits of RGB).
- Even more interestingly, it may serve as a complete, standalone module to use with our other PPU features. This means we have the option to avoid dedicating time to the HDMI implementation if we reuse the implementation from the demo.
After reviewing the demo code for HDMI on the DE10-Nano, I decided to swap the HDMI-bring-up task on the schedule to this week and design the PPU interface next week. I still intend to work on the PPU interface this week (on Sunday 28th – past the due date of this post), however, ensuring that HDMI could be taken care of was more important for me so that I could begin to gauge what kinds of PPU designs were possible. This schedule swap was mainly done as a mitigation strategy to prevent HDMI implementation (something I am unfamiliar with) from becoming a problem later on in the project.
The last interesting note about this week: I reached out to the TAs and course staff Thursday to get the DE10-Nano boards ordered. I hope to get access to these boards early so that we can test our code on actual hardware as soon as we are able to write it.
I was unable to design the PPU interface this week, so I am slightly behind schedule. I still have time to do it on Sunday (28th), but I expect it to be completed regardless by the next status report.
Next week I will be finishing the PPU interface as well as helping to design the system call interface. We also will have to be careful and plan around the time we must spend on the design review presentation.