This week, I worked on integrating the HPS controller code with FPGA program. I created a guide to do the installation and porting over of code to the SoC, and we were able to transfer and run the controller binary on Adolfo’s board, and the controller unit tests worked on his board.
Adolfo and I ran into unforseen problem where we couldn’t flash the FPGA without stopping the program on SoC , or have the program on FPGA keep running while executing the SoC program. We expected the HPS program and the FPGA program to both proceed simultaneously and talk to fpga peripherals.
To fix this, we first tried to get qsys, a system design integration tool, running on Adolfo’s laptop, but due to a bug with Windows/Qsys we couldn’t run Qsys on his laptop. For this temporary hitch, they used an RPI to processor controller inputs while I worked on Qsys.
I managed to integrate the HPS and FPGA parts of the board, with programs running on each of them, through understanding, working with, and writing a program on qsys. Now, we can run a program on SoC while flashing FPGA with a different program.
I also worked on the final presentation and delivery of the same.