This week we worked together to finish the FSMs for the CPU. Since there were so many FSMs, we decided to divide them amongst the team members so everyone had a thorough understanding of how the CPU worked and what the control signals would be. This will help make implementing the datapath and FSM easier in the future.
Furthermore each member developed a datapath/system diagram for their individual section (see further description in individual status updates). We now have to work together to understand how they will need to interact with each other so we can set standards for dependencies. This is one of the biggest risks because each part has their intricacies and we don’t want to violate any dependencies.
We had to shift our focus and polish our designs for the design presentation next week. For next week’s report, we hope to have implemented the CPU datapath and FSMs, and begin debugging. Individually, we hope to have our individual parts planned so they can be implemented as well.