This week I worked with Grace to learn more about the Ethernet ports on the FPGAs. Initially, we planned to run through the last demo that came with the DE2-115 boards (the demos can be found in the user manual – chapter 6). Because we were waiting for a USB-USB cable and a dual ended ethernet cable to come, we did not have the chance to run the demo. I am planning on running the demo later today or tomorrow. We were hoping to see a little bit more about what exactly using the ethernet port looks like in reality.
Because we were waiting to receive the cables, I spent most of Monday/Tuesday trying to look for resources on ethernet on our FPGA. Grace found information about the NIOS II processor which is a processor that runs on the FPGA’s internal components and makes it easier for users to interact with the components on the FPGA. I found this tutorial on creating a processor with the Triple Speed Ethernet ports (TSN Ethernet). I started walking through the tutorial on Wednesday to try to understand more about the process, but again, I couldn’t test it with the board because we received the cables on Thursday or Friday. A lot of my time this week was spent trying to find more resources on the TSN Ethernet ports, but there don’t seem to be too many resources. However, I did find the manual for the ethernet ports.
Lastly, I spent time research projects people have developed using the TSN ethernet and I tried to find some github projects with TSN ethernet, but I could only find people’s documentation not github repos. Most of our progress was hindered because we had to wait for our cables to come.
I also worked with Grace and Xiran to run tests on simulation to have a better idea of how long it takes to run some of these tests. I think we are a little behind where we wanted to be — I was hoping we would have been able to run some tests on the FPGA, but I am confident that we’ll be able to implement the ethernet protocol. Grace and I are probably going to meet Monday afternoon and work on the protocols some more. We are planning on looking through some of the code for the NIOS II processor to try to understand more about how the processor works, and how to correctly interface with the ethernet ports.