| Week |
Topic |
Note |
Reading |
Lecture |
Presenter |
| Aug. 29 |
Introduction |
|
|
 |
Prof. Falsafi |
|
Chip Multiprocessors |
|
CMP 1/2 |
|
Mike Ferdman |
| Sep. 5 |
No class |
Labor Day |
|
|
|
|
Chip Multiprocessors |
|
CMP 3/4 |
|
Group 1 |
| Sep. 12 |
Chip Multiprocessors |
|
CMP 5/6 |
|
Group 2 |
|
Transactional Architectures |
|
TA 1/2 |
|
Group 3 |
| Sep. 19 |
Transactional Architectures |
|
TA 3/4 |
|
Group 4 |
|
Transactional Architectures |
|
TA 5/6 |
|
Group 1 |
| Sep. 26 |
Transactional Architectures |
|
TA 7/8 |
|
Group 2 |
|
Non-thread-level Parallelism |
|
NTLP 1/2 |
|
Group 3 |
| Oct. 3 |
Non-thread-level Parallelism |
|
NTLP 3/4 |
|
Group 4 |
|
Non-thread-level Parallelism |
|
NTLP 5/6 |
|
Group 1 |
| Oct. 10 |
Non-thread-level Parallelism |
|
NTLP 7/8 |
|
Group 2 |
|
Non-thread-level Parallelism |
|
NTLP 9/10 |
|
Group 3 |
|
Composable Xacts & Vector-Thread |
|
MAKEUP |
|
Group 4 |
| Oct. 17 |
Memory Systems |
|
MS 1/2 |
|
Group 4 |
|
Memory Systems |
|
MS 3/4 |
|
Group 1 |
| Oct. 24 |
Memory Systems |
|
MS 5/6 |
|
Group 2 |
|
Memory Systems |
|
MS 7/8 |
|
Group 3 |
| Oct. 31 |
Memory Systems |
|
MS 9/10 |
|
Group 4 |
|
Simulating Complex Systems - READ PAPERS |
|
SIM 1/2 |
|
Tom Wenisch |
| Nov. 7 |
Simulation and Evaluation |
|
SIM 1/2 |
|
Group 1 |
|
Simulation and Evaluation |
|
SIM 3/4 |
|
Group 2 |
| Nov. 14 |
Reliability-Aware Architectures |
|
RA-A 1/2 |
|
Group 3 |
|
Reliability-Aware Architectures |
|
RA-A 3/4 |
|
Group 4 |
| Nov. 21 |
Reliability-Aware Architectures |
|
RA-A 5/6 |
|
Group 1 |
|
No class |
Thanksgiving |
|
|
|
| Nov. 28 |
Reliability-Aware Architectures |
|
RA-A 7/8 |
|
Group 2 |
|
Variability-Tolerant Architectures |
|
V-TA 1/2 |
|
Group 3 |
| Dec. 5 |
Variability-Tolerant Architectures |
|
V-TA 3/4 |
|
Group 4 |
| Dec. 9 |
Project Presentations |
in HH D-Level |
|
|
|
