This week, my efforts focused on moving from internal logic to visual output for the 2C02 PPU. I worked on the sprite rendering pipeline, which now successfully integrates the OAM priority logic with the pattern table fetching mechanism I developed previously. This allows the hardware to correctly handle the transparency and palette selection for up to eight sprites per scanline.
For the upcoming week, I aim to work on the VGA-to-PPU coordinate mapping and demonstrate a static pattern table display on a monitor.