Anju Ito’s Status Report for 3/11/2023

  • Work This Week
    • Significant amount of time was spent working on the design report this week, including FPGA implementations, diagrams, and overall project information.
    • Began coding modules for clock dividers that will be needed to time UART communication on the USB transceiver and laser side.
    • Came up with block diagram for the transceiver, consisting of 2 shift registers that will be enabled depending on number of bits that go into each.
  • Schedule
    • Design report took more amount of time than originally thought. Implementation will need to be worked on, which will hopefully be done the week after spring break.
  • Next Week
    • Have an overall implementation of all aspects of the FPGA, so that debugging can be conducted the week after using oscilloscopes for signal accuracy

Leave a Reply

Your email address will not be published. Required fields are marked *