This week I continued to work on the edge cases for legal move generation. Specifically the cases for en passant is tricky because it requires knowledge of the exact previous move and the move is a capture which does not capture on the square which the capturing piece moves to. Hence, there a quite a few extra components to that logic than originally anticipated.
Otherwise, progress on SV and FPGA seems to be going well. I will demo a quick testbenches of a few board states on Monday using the waveform viewer. After that the plan for this week is to finish the legal move generation including edge cases and begin integration with the FPGA and HPS.