This week Tess and I worked on getting the CPU to an almost finished state. We wrote tests that stressed each of the different possible instructions that the CPU can run and debugged the relevant parts. We spent the whole week on this. At the beginning of the week I got the testing infrastructure working. Testing assembly files is really easy now, since I made a testbench that loads files without the need to recompile and also made a bash script that automatically generates .hex files to load into memory. On Friday, we managed to pass all the tests we wrote for all the supported instructions. The CPU is able to run assembly scripts of varying complexity, the hardest test we wrote is Fibonacci. This test stresses our different load instructions, arithmetic instructions, conditional execution, and function calls. We also had more focused tests that tested specific instructions.
This weekend we worked on the peripherals, I worked on the PPU. The PPU FSM is working correctly and the fetcher also is working correctly. Unfortunately, due to issues related to setting up the new board, the PPU testing got delayed. Fortunately, setup issues didn’t last too long since I was able to get the VGA test running again on the new board. This wasn’t a waste of time since I got the pin assignments for the board and also figured out how to upload everything. This was the first time any of us worked with the new board with respect to uploading FPGA files and setting pin assignments.
Tess and I also researched the functionality of the other peripherals and got the DMA and the timer working. We also have a rough draft of the MMU and memory bank switching. We were very excited since we are now able to run some of mooneye’s tests, which are the benchmarks for cycle accuracy. We did not pass because of small of by 1 errors, which we hope to fix with an improved timer design which is more .
These were really useful resources for the peripherals and the instruction timings (I was able to merge typo fixes in one of them!):
Gameboy Complete Technical Reference
These were the assemblers and linkers that we used to compile our tests:
For this week we want to finish the simulation testing and go on to FPGA testing. I plan to finish the work on the PPU.