We changed our order for implementation but no main change to design. We will pressure time sync with simplest solution (just raw clock in RPi) before trying more complicated solutions like TCXOs or centralized clock with a wire connecting to each anchor.
The change was necessary because we were struggling to make progress on implementing the chips in same fashion before paralleling other tasks. And looks like we finally have that (even if we don’t fully understand the entire API yet)
Achieving accurate time sync remains a problem since we can only experimentally verify what will work and not plan for it.
We plan to ameliorate those risks by trying to start working on it next week (earlier than scheduled)
Here is our updated Gantt Chart.
Our main success in the past week was a functioning TWR demo, as seen in Shiva’s Status Update for 02/29. We also have to get a test in ANSYS on Monday though.