Team Status Report
Changes to schedule:
No changes, demo is on Monday.
Major project changes:
We’ve run into issues with JPEG streaming into the ARM core, which seems to be partially a result of network overhead as well as too much chunking of data, so we’re planning on looking into h.264 streams one last time since our current end-to-end FPS is around 1. On the hardware side, we have the final implementation for all the modules, but there is some stall around the gauss -> sobel or sobel -> NMS handshake. Ilan is working on debugging this using ILAs, and Edric is working on debugging this with the testbenches. We’ll be working through the night and for all of tomorrow to see if we can improve the software-limited framerate and get the full pipeline working.
Brandon
For this week on the project, we spent a lot of time on the final presentation and the poster. The time that I did spend on the project, I tried to increase FPS going into the demo, but that was mainly accomplished through Ilan’s private network and also added in a second pi for concurrent functionality. Since I was pretty much done with my part, not much else left for me to do other than some end to end testing and integration, and demo prep. Looking forward to finishing up with the demo and the final report and being done with the course!
Edric
Full pipeline implementation is done, and testing shows that everything works. Now it’s just a matter of hooking it up to the system, and also making further tweaks to the HLS pragmas to squeeze in some extra performance.
As stated in the presentation on Wednesday, some further optimizations are making better use of DSP slices and BRAM, as the reports show that this usage is extremely low. I’m still unsure about upping DSP usage, but I should be able to play with BRAM a bit.
Ilan
Personal accomplishments this week:
- Tested end-to-end with 1 Pi with Brandon. The framerate was low and we didn’t have to time to diagnose what was the issue, but we were sitting in the back of the 240 lab so our Wi-Fi signal likely wasn’t as good as it could have been.
- Testing private Wi-Fi network at home and found that with some configuration, updates, and tweaks I could get FPS of Pi directly to monitor laptop up to ~18 FPS, and I’m trying with the ARM core and the FPGA logic in the middle tonight (Saturday night) to see if we get better framerate.
- Tested FPGA with 333 MHz clock, it fails a few timing paths but the fabric still works without any errors. 300 MHz meets timing, so I’ll see if we need the slightly higher clock once I put in all of Edric’s IP blocks.
- Creating full FPGA pipeline on Sunday now that Edric has finished the full HLS implementation.
- Tweaked Pythons script that will interface with PL
Progress on schedule:
- No updates, schedule is ending.
Deliverables next week:
Final demo.