Layout for the 2-PCB design has been completed, but has not yet been reviewed.
See Monday’s presentation for review.
2-revision timeline remains on track to ensure any mistakes from rev. 1 can be remedied in time for final demo.
Firmware implementation may fall behind slightly due to 18-500 design report and homework overhead.
More time has been allocated in the schedule by pushing back UART interface implementation, as it is closely coupled with firewall and configuration work.
Design changes
No design changes have been made.
Updated schedule
Pushed revision one ordering back by a few days as it has not yet been reviewed (See our Gantt chart for more details.)
UART interface work has been moved to after spring break, to coincide better with firewall and configuration implementation tasks.