This week, I focused on preparing the firmware side of the project as we transition from system design into implementation. Since we have now ordered the STM32 development boards that we plan to use for prototyping, I began drafting the low-level drivers and software infrastructure that will be needed once the boards arrive. This includes looking at the interfaces required for the audio codec and planning how peripherals such as I2C, SAI/I2S, DMA, and timers will be configured. Starting this work before the development boards arrive should allow us to begin hardware testing relatively quickly once we have access to the processor.
I also continued refining how the real-time audio pipeline will operate on the STM32. Our current architecture relies heavily on DMA to continuously transfer audio between the codec and processor while allowing the CPU to perform the ANC computation in parallel. One of the first goals after hardware bring-up will therefore be to establish a basic DMA-based audio passthrough system before implementing the adaptive FxLMS algorithm. This will allow us to measure the actual latency, transfer timing, interrupt overhead, and processor utilization of the platform.
My work is currently on schedule, and the main dependency is receiving the development hardware so that the drivers can be tested on the actual processor. Over the next week, I plan to continue writing the initial peripheral drivers and preparing a basic audio-processing framework. Once the boards arrive, I will begin validating the drivers and working toward a simple real-time audio input and output test before adding the full ANC processing.