We are on track for work this week. In particular, we’ve narrowed down a lot about our design and component selection, including some fortunate changes towards the end.
We’re aiming roughly for Palm m515 compatibility, as it’s later-generation and fulfills our needs while still being of reasonable scope for a capstone. The m515 has 16MB RAM and 4MB flash, as well as a 33MHz processor. Very few embedded packages have this amount of RAM; for this reason, some prior art upgrades to a Raspberry Pi. This is certainly workable, but it’s overkill for our purposes. However, we don’t want to adopt the complexity of routing our own RAM chip.
I found a ESP32-P4/32 based board in stock with 32MB RAM and 32MB flash, and Sophia found stock of the chip. 400MHz will give us sufficient overhead for emulation, and the MCU has a low-power core appropriate for idle work. I developed a pin map to ensure feasibility, and I’ve started working with the HAL in Espressif’s `esp_hal` crate.
As mentioned last week, I’ve been understanding the 68k landscape. I’ve written a few simple programs using the Easy68k assembler/simulator, written by Brad Krupp and The Great Emerson.
My plan for the following week is:
– Case sketches by Monday night
– Practice using the 68k disassembler by Wednesday night
– Case model; instruction decoding in the hypervisor by Saturday night.
In case of unexpected delays, this schedule has quite a bit of room to flex, as it’s still ahead of our global schedule. I’d like to save that flexibility for future risks, if possible.