This week my main focus has been bringing up the FPGA’s block ram functionality, as well as creating a reading and writing module for it to interface with the chorus effects module. Intially I went into this knowing about how much storage I would need in order to implement a chorus effect. Using that info I learn how to build a RAM module from the Quartus MegaFunction Wizard. That enabled me to setup the ram the way I wanted. In this case I determined that separate read and write ports on a 2 port RAM would be useful since the chorus effect works by delaying the input sound by various short intervals and recombining it with the original, which means I constantly needed to be writing to the memory as well as constantly reading from several places in memory. These behaviors are what my reading and writing modules are designed to do. They can vary depending on how many channels or ‘voices’ I want to have in my chorus effect as well as how much delay I’d like in the chorus voices. I will begin testing of the module onboard the FPGA next week as well as a doing more work to decode the MIDI protocol on our FPGA. My progress is slightly behind due to my busy job search, however I aim to get back on track as my interviews start to finish up.