goal in 760 is to make students "CAD-literate" to the extent that they understand what the big problems are, what the core algorithms are, and how chips and tools and design methodologies interact. Folks in the IC and EDA (electronic design automation) industry often call or email with job offers relevant to people who have taken 760. This page is posts all these jobs-offered in a central forum. | |
31 Oct 01 -- Verplex -- verification jobs We are looking for candidates to join us here at Verplex Systems. Do you have any students who may be interested? The basic background needed is a knowledge of logic circuits, programming, and formal verification. I have included the standard company entry below, but there is considerable latitude in terms of background and experience. Thanks, Manish ----------------------------------------------------------------- Verplex Systems, Inc. the leading supplier of formal verification solutions for the electronic industry, develops advanced technologies in formal verification to address the verification needs in modern high-performance multi-million-gate chip designs. We currently have multiple openings in our San Jose, California office, offering aggressive growth and advancement opportunities, competitive salaries, generous benefits, stock options, and the chance to work with the very best in the challenging and exciting field of formal verification. Requirements: + PhD or MS in CS, EE or a related field with a minimum of two years of programming (C/C++) experience. Exceptional candidates with BS or recent graduates with significant experience and skills listed below will also be considered. + Excellent communication and problem solving skills, and self-motivation. AND one or more of the following: - Very strong programming skills with experience in developing advanced algorithms for combinatorial problems, or in designing VLSI digital circuits. - Experience with logic circuits (Boolean gates, latches, flip-flops, etc.) and their operations (pipelining, retiming, clock-gating, etc.). - Experience with binary decision diagrams (BDDs), automatic test pattern generation (ATPG), SAT, or logic synthesis and optimization. - Two years of experience in EDA development in verification or synthesis related areas or transistor-level analysis tools, e.g. equivalence/model checking, error diagnosis, logic simulation, high-level synthesis, and transistor-level extraction/simulation/timing tools. Interested candidates may contact Manish Pandey at mpandey@verplex.com or call him at (408)586-0318. 25 Sep 01 -- Local Startup Date: Mon, 24 Sep 2001 16:35:49 -0400 --------------------- NEOLINEAR Inc. - the technology leader in analog/mixed-signal design automation software. Neolinear, a rapid-growth entrepreneurial company, is revolutionizing the design of analog/mixed signal semiconductors and systems-on-chip (SoC) integrated circuits for the semiconductor industry. Today's high tech products, from cell phones to DVD players, contain an increasing proportion of analog and mixed-signal technology. Since analog/mixed-signal design is extremely challenging, it has remained manually intensive. Neolinear is changing that design paradigm and the customer value proposition is immense. Neolinear provides an opportunity to work with cutting-edge technology and world-renowned experts in a friendly, can-do culture. We need individuals who want to challenge their abilities by bringing strong motivation and proven skills to our team environment. We offer exciting job opportunities in Pittsburgh and at various other locations around the world. For details, please visit our web site at: www.neolinear.com or email jobs@neolinear.com Please stop by our booth at TOC 2001. 27 Aug 01 -- Nothing here yet... |
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