Alvin’s Status Report for 3/16

Personal tasks of this week:

Task: Changing the simulation time discretization

Definition: Currently, the time discretization for the simulation and the NMPC formulation is the same. Essentially, the next state that the NMPC controller produces is used as the real next state. However, there is a flaw in this design, as the time discretization of the controller is quite large(0.2). This might cause the next state to not actually obey real world physics. To solve this problem, we can change the code such that after the controller produces a control, that is used by the simulator to generate the true next state with a much finer time discretization(0.01)

Completion: I was able to implement this change. The simulation now reflects real world physics much more closely. It also demonstrated that our dynamics derivation and controller design were correct.

 

 

 

Next Steps:

We’ve made some modifications to our schedule and the next step is still to look into ways to formulate the problem in way that is solvable by the circuits we have.

Overall progress assessment:

Schedule is changed, so slightly behind.

Team Status Report for March 16

Significant risks and risk management:

Risk: The analog circuit as described by Sergey’s Thesis cannot be realized.

Definition: Through some more research and implementing his circuits through simulation, we were able to determine that the constraint primitives are not able to be realized for our optimization problem. Specifically, for the equality constraint, the theoretical formulation assumed infinite op amp rail voltages and the quadratic costs  could not properly be realized without first solving a linear programming problem.

Severity: The severity is very high. If this is not able to be resolved, our circuit will fail to converge.

Resolution:  We were able to resolve both of these issues. For the inequality, we reduced the operating voltage by 10x, so that the maximum voltage that we expect is within the rails of the op amp. As for the costs, we realized that we could not implement these quadratic costs for SQP without first solving a SLP (sequential linear programming), so we decided to compromise and solve our optimization problems using an SLP, using linear costs

Current progress:

We have resolved the issues regarding the constraints

Changes to the existing design:

We have modified our problem formulation from SQP to SLP, modified the constraints to account for op amp rail voltages, and slightly descoped the optimization problem.

Changes to the project schedule:

Similarly, there are no significant changes to the project schedule, we are a bit behind schedule with pcb ordering though.

Thomas’s Status Report for Mar 16

Personal tasks of this week:

Task: Resolving Issues in Dr. Vichik’s Design

Definition: Based on our analysis of the failure of Dr. Vichik’s circuit in solving certain optimization problems, develop a fix that enables the circuit to consistently solve the set of problems required by our formulation.

Completion: The task is completed. I reduced the dynamic range from 100mV, which is used by Dr. Vichik’s in his design, to 10mV, preventing the op-amps from saturating in a pessimistic example problem. In addition, the SQP algorithm is replaced by the SLP (sequential linear programming) algorithm in our design to avoid other issues in Dr. Vichik’s QP circuit. Based on the new design, we updated the BoM and re-estimated component and manufacturing cost.

Task: Simplification of the NMPC problem

Definition: Formulate an alternative NMPC problem with less variables to reduce the size of the associated NLP, which reduces the complexity and cost of the analog circuit.

Completion: The task is completed. We formulated a torque-limited single pendulum swing-up problem, which is analogous to the mountain car problem, a classical problem in reenforcement learning. It has a lower-dimensional state space than the double pendulum swing-up problem, and its dynamics is still nonlinear. Alvin modified the code and we were able to achieve swing-up with NMPC.

Next Steps:

My next step is to synthesize the full circuit with Andrew, and implement SLP with Alvin.

Overall progress assessment:

My progress is on-schedule, as all of my tasks this week have been completed.

Andrew’s Status Report for March 16

Personal tasks of this week:

Task: Circuit Simulation:

Definition:  According the Sergey’s thesis, the theoretical circuit primitives were found to model the mathematical constraint. However, the circuits need to be modified to realize the theoretical circuit, as it contains ideal circuits that don’t exist in the real world.

Completion: The task is completed. Analyzing the issues from Sergey’s thesis from last week, we were able to solve all of the issues we were facing. In regards to the equality constraint, we realized that the theoretical formulation of the constraint was correct, but did not take into account that the op-amp rail voltages are not infinite :/ As a result, if the voltages in the realized simulation end up maxing out at the rails, the circuit would continue to oscillate and never converge. To fix this, we realized that we can scale down our operating voltage from -100 mV – 100 mV, which was used my Sergey, to -10mV – 10mV. As a result, in our simulations, we can observe that the voltages properly converge. All of the simulations now are verified using the models of the finalized BOM.

Furthermore, the constraints were abstracted into components in LTSpice to make simulation much simpler and less prone to errors.

The inequality constraints were based on an op-amp clamp. Simply changing the direction of the diode will change the direction of the op-amp. Chaining two of them together can create a bounded clamp.

After slightly descoping the project, here is the finalized BOM. Now, even when considering the more expensive, but reliable option, PCBWAY, we are within the allocated budget for the project.


Next Steps:

The next steps is to create full scale simulation of the optimization circuit using our currently verified and abstracted constraints. Considering that we have slightly descoped the optimization problem to ensure that the final demo will work, we are now on budget as well.

Overall progress assessment:

My progress is slightly behind-schedule, as we have resolved all of the current issues with the circuit, but because of that, are behind in the PCB design and fabrication.

Andrew’s Status Report for March 2

Personal tasks of this week:

Task: Preliminary Circuit Simulation:

Definition:  According the Sergey’s thesis, the theoretical circuit primitives were found to model the mathematical constraint. However, the circuits need to be modified to realize the theoretical circuit, as it contains ideal circuits that don’t exist in the real world.

Completion: The task is partially completed. Further research was done in order to finalize the components that would be used. In particular, a preliminary BOM of the PCB was created:

Item Description Quantity Cost Total
OPA4376 buffer op-amp 4 3.62 14.48
OPA2328 high bandwidth op-amp 26 3.18 82.68
AD5144ABRUZ100 100k digipot (I2C) 16 8.18 130.88
AD5254BRUZ1 1k digipot (I2C) 16 8.59 137.44
ADS7056 ADC (14-bit) 1 5.32 5.32
ADG732 1:32 Analog mux 1 14.41 14.41
MCP47CVD22 DAC (12-bit, 2-channel) 6 3.23 19.38
TCA9548A i2c multiplexer (8-channel) 3 1.19 3.57
ADG734BRUZ-REEL7 switches (4-channel) 19 4.23 80.37
BAS70-04S diode (2×2) 8 0.54 4.32

Furthermore, while we found significant issues with the realized formulation of Sergey’s thesis, we were able to create and simulate the realized constraints in LT Spice. The behavior of each constraint was verified and now only the simple optimization problem needs to be created.

 

Next Steps:

The next steps are to first create and verify the simple optimization problem, and then scale to the full problem once we are able to resolve the issues and concerns we have with Sergey’s thesis.

Overall progress assessment:

My progress is slightly behind-schedule, as we needed to address issues regarding Sergey’s thesis, but we have resolved the majority of issues regarding it.

 

Team Status Report for Mar 2

Significant risks and risk management:

Risk: Dr. Vichik’s analog circuit failing to solve the problems we specify

Description: In a preliminary circuit simulation, we tried to solve a simple LP with the analog circuit proposed by Dr. Vichik. However, we found that the circuit fails to solve the LP with certain parameters. This indicates a risk that the circuit might not be able to solve the problems we specify.

Severity: If Dr. Vichik’s circuit fails to solve optimization problems we specify, the progress of the whole project would be severely jeopardized, because the design of our analog SQP solver is centered around Dr. Vichik’s circuit primitives. This is the most significant risk we’ve encountered so far.

Resolution: We are currently investigating the nature of the issue that causes Dr. Vichik’s circuit to fail. We aim to either solve this issue by improving Dr. Vichik’s design, or mitigate it by avoiding the optimization problems that would cause it to fail.

Changes to the existing design:

There are currently no significant changes to the existing design. However, depending on the nature of the issue that causes Dr. Vichik’s design to fail, changes to our design might be necessary.

Changes to the project schedule:

Similarly, there are currently no significant changes to the project schedule. We might have to delay PCB layout and manufacturing if finding the solution takes more time than expected.

Answers to additional questions:

Part A:

It is difficult to say whether our product can meet a specific need with regards to global factors. While it can be said that the capability to solve optimization problems faster and more efficiently has a wide range of potential benefits, it is unclear which specific benefit our work will entail. Some potential global benefits include MPC for safer vehicle controls, which would benefit the transition to electric vehicles globally.

Part B:

It is difficult to say whether our product can meet a specific need with regards to cultural factors. This is mainly because our product only serves as a proof of concept for the possibility of solving optimization problems faster and more efficiently than existing solutions. It is hard to predict how our solution will be modified and integrated into other products, and thus we cannot say if our product will meet specific needs in relation to cultural factors.

Part C:

Our proposed product has the potential of yielding a positive environmental impact. Optimization is widely used in process engineering, which focuses on optimizing industrial and logistical processes. By improving the speed of solving optimization problems, many industries and logistical systems can be made much more efficiency in terms of energy consumption and resources usage. In addition, solving optimization problems on digital computers can be very energy-intensive, while our proposed analog solver consumes much less power. We also plan to use RoHS-compliant components, as well as lead-free PCBs, to reduce the amount of harmful substances in our product. Therefore, our product has the potential of contributing to sustainable development.

Part A was written by Andrew, Part B was written by Alvin, and Part C was written by Thomas.

Alvin’s Status Report for 3/2

Personal tasks of this week:

Task: Formulation of NLP

Definition: Formulating the non linear program for the double pendulum swing up

Completion: After working with Thomas, I was able to derive the NLP for the double pendulum swing up. This consisted of defining the cost function and translating the dynamics of the system into constraints.

 

 

Task: Design review report

Definition: Writing the design review report

Completion: The report is completed.

 

Next Steps:

We’ve made some modifications to our schedule, including adding more prototypes and changing our approach to the problem due to finding some limitations in Sergey’s circuit design, so the next step will be to look into ways to formulate the problem in way that is solvable by the circuits we have.

Overall progress assessment:

Schedule is changed, but still on schedule.

Thomas’s Status Report for Mar 2

Personal tasks of this week:

Task: Preliminary Simulation of Circuit Primitives

Definition: Build a circuit simulation in EveryCircuit, a simple circuit simulator, to validate the circuit primitives proposed in Dr. Vichik’s thesis on a small-scale optimization problem.

Completion: The task is completed. I was able to build a solver for a simple LP according to Dr. Vichick’s design. However, the simulation yields concerning results, as I was able to tune the parameters of the LP to make the circuit fail to solve it. We will need to further investigate its implications.

Task: Symbolic NLP Formulation of the NMPC Swing-Up Controller

Definition: Symbolically formulate the NMPC Swing-Up controller as an NLP, which acts as the NLP problem we supply to the analog SQP solver on each iteration. Validate the formulation by solving it with an open source NLP solver.

Completion: The task is completed. Alvin and I have successfully formulated the problem as an NLP, and were able to swing up a double pendulum in simulation by repeatedly solving it. Below is a visualization of the controlled double pendulum:

Next Steps:

My next step is to investigate the implications of the failure of Dr. Vichik’s circuit to solve some LPs, and develop a solution accordingly.

Overall progress assessment:

My progress is on-schedule, as all of my tasks this week have been completed. However, the observed failure of Dr. Vichik’s design indicates a significant risk.

Andrew’s Status Report for Feb 24

Personal tasks of this week:

Task: Preliminary Circuit Simulation:

Definition:  According the Sergey’s thesis, the theoretical circuit primitives were found to model the mathematical constraint. However, the circuits need to be modified to realize the theoretical circuit, as it contains ideal circuits that don’t exist in the real world.

Completion: The task is partially completed.  The circuit was researched and equivalent components from the thesis that can be sourced now were found for each component.  The circuit was attempted first in PSpice, but decided to transition into using LTSpice, as we realized the speed of learning and prototyping ability of LTSpice was much more important given our time constraints compared to the features available on PSpice. A basic schematic was built for each primitive, but has not been tested extensively for the simple optimization circuit

Next Steps:

The next steps are to use PSpice to create the simulation of the simple optimization circuit and verify if the minimum energy state converges to the expected solution.

Overall progress assessment:

My progress is slightly behind-schedule, as I still need to finish up the optimization circuit, but it should not be that difficult to catch up, as the components have already been selected and imported.

 

Team Status Report for Feb 24

Significant risks and risk management:

Risk: The analog circuit can’t meet the required tolerances

Definition: This risk has been brought to our attention by our assigned in instructor Thomas Sullivan (Thanks!). It is currently unclear to us what tolerance the analog components will need to have in order to satisfy the 10% solution accuracy required by the accuracy requirement (NR3). This is nontrivial to determine as the accuracy of the whole circuit can’t be easily associated with the accuracy of individual components.

Severity: If the analog circuit can’t meet the required tolerances, the progress of the whole project would be severely jeopardized, because the accuracy requirement (NR3) would not be satisfied.

Resolution: A solution is to use Sergey’s work [1] as a reference. If our components are more accurate than Sergey’s components in every relevant measure, it is likely that the whole circuit wouldn’t be significantly worse in accuracy compared to his circuit. This is possible because  more accurate components are available since his work was published.

Current progress:

We have completed P2, and is currently working towards P1 and P3. We performed some benchmarking on P2, with results showing that the majority of the time spent in the solver is on the QP subproblem(32ms out of 38ms). This means that if we solve the QP subproblem with our analog solver we can potentially get large speed up.

Changes to the existing design:

There are no changes to the existing design. We have completed P2 successfully, indicating that we can proceed with our existing design.

Changes to the project schedule:

Similarly, there are no significant changes to the project schedule.