Work Update
This week the entirity of my bandwidth for capstone for the front end of the week was consumed by writting my portion of the Design Document. This ended up taking considerably more time than was expected to complete as certain parts of the formatting did not want to play nice with inserting new figures and copying over text from Google Docs where we could colaborate as a team on the document. After the Design Document was due I had a lot of work in my other classes leading in to spring break and was completely swampped. As a result of this and the amount of time that the design document took, I was unable to complete most of the work that I had hoped to complete this week. This included writing the first pass of all of the verilog modules for the wavetable synthesis portion of the pipeline and creating the pakage file for sending translated MIDI control messages.
Scheduling
Now that I am behind schedule from the progress that I had hoped to make last week I have lost the bit of slack that I had gained from weeks prior. In addition despite the fact that this coming up week is Spring Break and I am going to be in London having fun for the duration of the week, I am going to have to try and take time out from siteseeing and watching soccer games to write the verilog files for this project. This means that for the coming up week I hope to have the first pass at the verilog files complete and have to complete the ethics case study for next weeks class as well.
