Weekly Progress
The beginning of the week was spent busy polishing up the design review report and integrating everybody’s parts together. We had all written our sections independently and consolidated in the end, since it was difficult to work on it collaboratively with the formatting. I worked on filling in extra details on some sections, and also worked on formatting the final report (formatting in Word can be a pain).
Unfortunately, I think that most of our group got caught in a slew of midterms this week which ate up a lot of our available time. We worked as a group to flesh out the interfaces between a lot of our modules this week, and we each planned out our goals on work over Spring Break.
This week, I worked more on the Verilog implementation side as well, although less than I would have liked. Implementation of both the actual modules and the testing framework is underway now and I don’t anticipate there being any major issues in terms of scheduling.
Goals for Next Week
Next week is Spring Break, and I have very little planned, so I will try to get as much of the Verilog implementation done over the break. I have a small electronics lab setup at home, so I will see if I can run some tests on both the MIDI interface components as well as try to test my personal synthesizer for benchmarking purposes. My main goal will be to finish up the implementation stage for effects and begin the testing and fine-tuning steps.
