This week Ali and I again focused on understanding the NOIS II processor on the FPGA boards. Unfortunately, we were halted from initiating some of our work due to delays in having access to equipment we needed in order to run some of the demos. However, once we were able to connect to the board using Ethernet, we worked through some of the demos that come with the DE2-115 FPGA board. We were unable to run the demo we wanted to run because we need an internet gateway, which we do not have and do not want to buy since we won’t need it for our project. However, even without being able to actually run the demo, we were able to see how the NOIS II actually is implemented on the board and how to access its own command line. We also investigated more about how Quartus interfaces with the NOIS II, something that we will need to continue to look into this upcoming week.
I also spent some time at the beginning of the week preparing for the design presentation, since I was our group’s presenter. On Sunday night, I did a few dry runs and really tried to prepare a good narrative for our project. Xiran and Ali were kind enough to watch and give me some very valuable feedback.
I also started working on the design report at the end of the week. I’m planning on spending most of the early part of this week focusing on the design report.
Other than the design report, Ali and I plan on actually running the NOIS II processor on our board this week to create a communication protocol. We will most likely need more time than expected to finish this task.