Before today’s SoC chips are manufactured and shipped, the design needs to be extensively tested in software simulation to verify functionality. This step, known as verification, is often the bottleneck of the chip design process due to software simulation taking notoriously long to run. Speaking from personal experience, we know companies can spend up to months running simulations; this both takes up significant compute resources and increases time-to-market.

Our project aims to speed up the verification process by using custom hardware, instead of software simulation, to run tests. More specifically, we will be using a FPGA, which is a configurable and relatively cheap integrated circuit. We hope to leverage the fast hardware clock of the FPGA to complete tests in much shorter times than they take in simulation.