I spent this week focusing on 2 things: preparing for the proposal presentation, and also researching the JTAG protocol. I spent a decent amount of time making sure that I was ready to present and could have a decent presentation.
Next, I spent time trying to understand more about the I/O protocols that the DE2-115 FPGA can manage. I found the user manual and started investigating how to debug JTAG vs USB vs Ethernet. It seems like JTAG has some of the expected benefits and detriments — easy to use, but might not be fast enough. Typically, JTAG can transfer data at a rate between 10 MHz and 100 MHz. Although this might be fast enough to send data in 1 direction, it might not be able to support sending enough data from the FPGA to the PC.
I think I am a little behind schedule, but I am planning on finishing up research and playing around with an FPGA early this week, and then working with Grace to develop the communication protocol.
For next week, I’m hoping to have finished or nearly finished the FPGA protocol.