Grace’s Status Report for 9/18

This week I focused on helping our team finalize our project idea. We came into the week bouncing a few more ideas around until our meeting with Tamal and Joel. Based off of their suggestions, we decided to focus on the general idea of using FPGA prototyping to speedup simulation. Using our experiences in 18-447, we decided to focus on a debugging assistance tool that can compare the output of the DUT on the FPGA with a software golden model cycle-by-cycle. We realized that our most important design decision would be deciding how we communicated with the DUT to feed it input and receive the output. As such, I researched and conferred with my teammates on different methods of sending data.

To gain some more advice, we met with Professor Bill Nace to discuss the attributes of the Altera FPGA boards available in the lab. Based off of his guidence, this upcoming week will have us focus on testing different communication systems (usb, ethernet, etc.) with the FPGA. We are hoping that by the end of the next few weeks, we have modeled an efficient method of sending input and receiving output.

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