Introduction and Project Summary

In robotic computing, motion planning is a critical step that finds trajectory for robots to move from a starting position to a goal position without colliding with obstacles. As robots are becoming more and more complex and are acquiring more degrees of freedom to their movements, computing a motion plan becomes a compute-intensive task. Specifically, for latency-sensitive robots, running motion planning algorithms (such as Rapidly-exploring Random Tree, or RRT) on CPUs is too slow. Our project aims to accelerate motion-planning via hardware acceleration on an FPGA.