This past week I spent most of my time trying to get an Vitis HLS environment set up for our new AMD Kria KR260 board. While I have a working environment set up for the Ultra96v2 (our backup FPGA board), I was not able to get it working on the Kria. We want to use the Kria because it is more powerful, and it was gifted to us by AMD to use for robotics-related experiments. The Ultra96v2 was already set up by 18-643 staff for use in the labs, but since the Kria is a new board, I have to configure the environment myself, a process that I am not familiar with. To get help with the setup of the Kria, I was able to get in touch with someone from AMD who will guide me on the setup. We plan on meeting sometime early next week.
Our RRT implementation is done for the most part, and so once the HLS environment is set up, we should able to start writing HLS code to build the accelerated version of RRT. Next week I plan on doing HLS development in preparation for the interim demo. This will probably my largest task for our project this semester. I am aiming for at least >1 speedup with no/few optimizations (i.e. hopefully not a slowdown).