readings
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readings [2014/10/15 15:05] yixinluo |
readings [2014/10/27 20:58] yixinluo |
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| Note that the reviews are due at 11:59 PM on the due date. | Note that the reviews are due at 11:59 PM on the due date. | ||
| - | ==== Reading List (now in reverse order) ==== | + | ==== Reading List (in reverse order) ==== |
| + | === 10/31/2014 === | ||
| + | Review required for the following two papers, due on Friday, Oct 31. | ||
| + | * **[[http://www.cs.utexas.edu/~pingali/CS395T/2009fa/lectures/herlihy93transactional.pdf|Maurice Herlihy and J. Eliot B. Moss, "Transactional Memory: Architectural Support for Lock-Free Data Structures", ISCA 1993.]]** | ||
| + | * **[[http://www.cs.cmu.edu/~tcm/tcm_papers/isca00.pdf|J. Gregory Steffan et al., "A Scalable Approach to Thread-Level Speculation", ISCA 2000.]]** | ||
| + | Required videos for module 2.5.* in [[http://www.ece.cmu.edu/~ece740/f13/doku.php?id=schedule#schedule|18-740]]: | ||
| + | | 9/25 Wed. | 2.5.1 Speculation | [[http://www.ece.cmu.edu/~ece742/f14/files/onur-740-fall13-module2.5-speculation.pdf|pdf]], [[http://www.ece.cmu.edu/~ece742/f14/files/onur-740-fall13-module2.5-speculation.pptx|pptx]], [[https://www.youtube.com/watch?v=g3IF8DTtr8c|YouTube]][[http://cmu.vid.acatar.com/Panopto/Pages/Viewer/Default.aspx?id=dbb3baf9-c85e-4007-8c71-1e3204fe9907|Panopto]] | [[http://www.ece.cmu.edu/~ece740/f13/doku.php?id=readings#module_2-5|readings]] | | ||
| + | | 9/27 Fri. | 2.5.2 Speculation | [[https://www.youtube.com/watch?v=FqHk4bxrI8Y|video]] [[http://cmu.vid.acatar.com/Panopto/Pages/Viewer/Default.aspx?id=bf92ac2b-5fb5-4896-9bbd-6cb216a16cdd|Panopto]] | ::: | | ||
| + | | 9/30 Mon. | 2.5.3 Speculation | [[https://www.youtube.com/watch?v=uhyNTy8hvDs|video]] [[http://cmu.vid.acatar.com/Panopto/Pages/Viewer/Default.aspx?id=7dbc66b0-b245-45ba-b047-09a84427676a|Panopto]] | ::: | | ||
| + | | ::: | 2.5.4 Speculation | [[https://www.youtube.com/watch?v=McMyefc8CCE|video]] [[http://cmu.vid.acatar.com/Panopto/Pages/Viewer/Default.aspx?id=e9eddf7c-c5c0-4ab4-a731-30852d601506|Panopto]] | ::: | | ||
| + | Related readings: | ||
| + | * [[ftp://ftp.cs.wisc.edu/sohi/papers/1995/isca.multiscalar.pdf|Sohi et al., “Multiscalar Processors,” ISCA 1995.]] | ||
| + | * [[http://classes.soe.ucsc.edu/cmpe202/Spring13/papers/12a.pdf|Zhou, “Dual-Core Execution: Building a Highly Scalable Single-Thread Instruction Window,” PACT 2005.]] | ||
| + | * [[http://pages.cs.wisc.edu/~rajwar/papers/micro01.pdf|Rajwar and Goodman, “Speculative Lock Elision: Enabling Highly Concurrent Multithreaded Execution,” MICRO 2001.]] | ||
| === 10/16/2014 === | === 10/16/2014 === | ||
| Review required (one out of two) due on Wednesday night | Review required (one out of two) due on Wednesday night | ||
| - | * **[[https://homes.cs.washington.edu/~luisceze/publications/isca07_bulksc.pdf|Ceze et al., "BulkSC: Bulk Enforcement of Sequential Consistency", ISCA 2007.]]** | ||
| * **[[http://www.eecg.toronto.edu/~moshovos/research/store-wait-free.pdf|Wenisch et al., "Mechanisms for Store-wait–free Multiprocessors", ISCA 2007]]** | * **[[http://www.eecg.toronto.edu/~moshovos/research/store-wait-free.pdf|Wenisch et al., "Mechanisms for Store-wait–free Multiprocessors", ISCA 2007]]** | ||
| + | * [[http://www.cs.utexas.edu/~pingali/CS395T/2009fa/lectures/herlihy93transactional.pdf|Herlihy et al., "Transactional Memory: Architectural Support for Lock-Free Data Structures", ISCA 1993.]] | ||
| + | * [[http://www.cs.cmu.edu/~tcm/tcm_papers/isca00.pdf|Steffan et al., "A Scalable Approach to Thread-Level Speculation", ISCA 2000.]] | ||
| + | * **[[https://homes.cs.washington.edu/~luisceze/publications/isca07_bulksc.pdf|Ceze et al., "BulkSC: Bulk Enforcement of Sequential Consistency", ISCA 2007.]]** | ||
| + | * [[https://homes.cs.washington.edu/~luisceze/publications/isca06_bulk.pdf|Ceze et al., "Bulk Disambiguation of Speculative Threads in Multiprocessors", ISCA 2006.]] | ||
| + | * [[http://www.ece.cmu.edu/~ece740/f13/lib/exe/fetch.php?media=rajwar01.pdf|Rajwar and Goodman, “Speculative Lock Elision: Enabling Highly Concurrent Multithreaded Execution”, MICRO 2001.]] | ||
| + | * [[http://www.ece.cmu.edu/~ece740/f13/lib/exe/fetch.php?media=herlihy93.pdf|Herlihy and Moss, “Transactional Memory: Architectural Support for Lock-Free Data Structures”, ISCA 1993.]] | ||
| === 10/14/2014 === | === 10/14/2014 === | ||
| Line 19: | Line 38: | ||
| * **[[https://courses.engr.illinois.edu/cs533/sp2012/reading_list/gharachorloo91two.pdf|Gharachorloo et al., "Two Techniques to Enhance the Performance of Memory Consistency Models", ICPP 1991.]]** | * **[[https://courses.engr.illinois.edu/cs533/sp2012/reading_list/gharachorloo91two.pdf|Gharachorloo et al., "Two Techniques to Enhance the Performance of Memory Consistency Models", ICPP 1991.]]** | ||
| * [[http://www.csd.uoc.gr/~hy460/pdf/kung.pdf|Kung et al., "On Optimistic Methods for Concurrency Control", TODS 1981.]] | * [[http://www.csd.uoc.gr/~hy460/pdf/kung.pdf|Kung et al., "On Optimistic Methods for Concurrency Control", TODS 1981.]] | ||
| + | * [[https://engineering.purdue.edu/~vpai/Publications/ranganathan-spaa97.pdf|Ranganathan et al., "Using Speculative Retirement and Larger Instruction Windows to Narrow the Performance Gap Between Memory Consistency Models", SPAA 1997.]] | ||
| + | * [[http://www.cs.arizona.edu/~gniady/papers/isca99_scrc.pdf|Gniady et al., "Is SC + ILP = RC?", ISCA 1999.]] | ||
| Recommended book | Recommended book | ||
| * [[http://www.morganclaypool.com/doi/pdfplus/10.2200/S00346ED1V01Y201104CAC016|A Primer on Memory Consistency and Cache Coherence, Chapters 1, 3, 4, 5]] | * [[http://www.morganclaypool.com/doi/pdfplus/10.2200/S00346ED1V01Y201104CAC016|A Primer on Memory Consistency and Cache Coherence, Chapters 1, 3, 4, 5]] | ||
readings.txt · Last modified: 2014/12/03 21:12 by yixinluo
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