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readings [2014/10/09 15:07] yixinluo |
readings [2014/10/09 15:58] yixinluo |
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Amirali's Literature Survey | Amirali's Literature Survey | ||
* [[http://www.cs.utah.edu/events/thememoryforum/mike.pdf|http://www.cs.utah.edu/events/thememoryforum/mike.pdf|Connor et al., "Highlights of the high-bandwidth memory (HBM) standard", Memory Forum 2014.]] | * [[http://www.cs.utah.edu/events/thememoryforum/mike.pdf|http://www.cs.utah.edu/events/thememoryforum/mike.pdf|Connor et al., "Highlights of the high-bandwidth memory (HBM) standard", Memory Forum 2014.]] | ||
- | * **[[http://mercury.pr.erau.edu/~davisb22/papers/burst_scheduling_hpca13.pdf|Shao et al., "A Burst Scheduling Access Reordering Mechanism", HPCA 2013.]]** | + | Jiyuan's Paper Discussion |
+ | * **[[http://mercury.pr.erau.edu/~davisb22/papers/burst_scheduling_hpca13.pdf|Shao et al., "A Burst Scheduling Access Reordering Mechanism", HPCA 2007.]]** | ||
* **[[http://www.cs.cmu.edu/~chensm/LBA_reading_group/papers/3Ddram-isca08.pdf|Loh et al., "3D-Stacked Memory Architectures for Multi-Core Processors", ISCA 2008.]]** | * **[[http://www.cs.cmu.edu/~chensm/LBA_reading_group/papers/3Ddram-isca08.pdf|Loh et al., "3D-Stacked Memory Architectures for Multi-Core Processors", ISCA 2008.]]** | ||
* **[[http://www.dongpingzhang.com/wordpress/wp-content/uploads/2013/06/MSPC6-Zhang.pdf|Zhang et al., "A New Perspective on Processing-in-memory Architecture Design", MSPC 2013.]]** | * **[[http://www.dongpingzhang.com/wordpress/wp-content/uploads/2013/06/MSPC6-Zhang.pdf|Zhang et al., "A New Perspective on Processing-in-memory Architecture Design", MSPC 2013.]]** |