readings
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readings [2014/09/23 15:40] yixinluo |
readings [2014/10/03 18:42] yixinluo |
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| ==== Reading List (now in reverse order) ==== | ==== Reading List (now in reverse order) ==== | ||
| + | === 10/7/2014 === | ||
| + | * **[[http://tinker.cc.gatech.edu/pdfs/MICRO44_Jesse_Beu.pdf|Beu et al., "Manager-Client Pairing: A Framework for Implementing Coherence Hierarchies", MICRO 2011.]]** | ||
| + | * **[[http://research.cs.wisc.edu/multifacet/papers/hpca14_quick_release.pdf|Hechtman et al., "Quick Release: A Throughput-oriented Approach to Release Consistency on GPUs", HPCC 2014.]]** | ||
| + | * **[[http://dl.acm.org/citation.cfm?id=2541982|Voskuilen et al., "High-Performance Fractal Coherence", ASPLOS 2014.]]** | ||
| - | === 9/25/2014 === | + | |
| + | === 10/2/2014 === | ||
| + | ^ Due 9/28/2014 | [[http://www.cs.utah.edu/events/thememoryforum/kang.pdf|Kang et al., "Co-Architecting Controllers and DRAM to Enhance DRAM Process Scaling", Memory Forum 2014.]] | | ||
| + | ^ | [[http://users.ece.cmu.edu/~omutlu/pub/salp-dram_isca12.pdf|Kim et al., "A Case for Exploiting Subarray-Level Parallelism (SALP) in DRAM", ISCA 2012.]] | | ||
| + | |||
| + | === 10/1/2014 === | ||
| + | Amirali's literature survey: | ||
| + | |||
| + | === 9/30/2014 === | ||
| Doru's literature survey: | Doru's literature survey: | ||
| - | * [[http://hps.ece.utexas.edu/pub/morphcore_micro2012.pdf|Khubaib et al., "MorphCore: An Energy-Efficient Microarchitecture for High Performance ILP and High Throughput TLP", ISCA 2012.]] | + | * **[[http://users.elis.ugent.be/~leeckhou/papers/isca13.pdf|Bois et al., "Criticality Stacks: Identifying Critical Threads in Parallel Programs using Synchronization Behavior", ISCA 2013.]]** |
| - | * [[http://users.eecs.northwestern.edu/~rjoseph/eecs453/papers/quereshi-micro2006.pdf|Qureshi et al., "Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches", MICRO 2006.]] | + | * **[[http://www.istc-cc.cmu.edu/publications/papers/2013/joao_isca13_preprint.pdf|Joao et al., "Utility-Based Acceleration of Multithreaded Applications on Asymmetric CMPs", ISCA 2013.]]** |
| - | * [[http://users.elis.ugent.be/~leeckhou/papers/isca13.pdf|Bois et al., "Criticality Stacks: Identifying Critical Threads in Parallel Programs using Synchronization Behavior", ISCA 2013.]] | + | * [[http://users.elis.ugent.be/~leeckhou/papers/isca12-2.pdf|Craeynest et al., "Scheduling Heterogeneous Multi-Cores through Performance Impact Estimation (PIE)", ISCA 2012.]] |
| + | * [[http://webdocs.cs.ualberta.ca/~amaral/courses/605/papers/DuesterwaldEtAl.pdf|Evelyn Duesterwald et al., "Characterizing and Predicting Program Behavior and its Variability", PACT 2003.]] | ||
| + | * **[[http://hps.ece.utexas.edu/pub/morphcore_micro2012.pdf|Khubaib et al., "MorphCore: An Energy-Efficient Microarchitecture for High Performance ILP and High Throughput TLP", ISCA 2012.]]** | ||
| + | * [[http://cccp.eecs.umich.edu/papers/lukefahr_micro12.pdf|Andrew Lukefahr et al., "Composite Cores: Pushing Heterogeneity Into a Core", MICRO 2012.]] | ||
| + | * [[http://cccp.eecs.umich.edu/papers/shrupad_micro13.pdf|Shruti Padmanabha et al., "Trace based phase prediction for tightly-coupled heterogeneous cores", MICRO 2013.]] | ||
| + | * [[http://m3.csl.cornell.edu/papers/isca07.pdf|Engin Ipek et al., "Core fusion: accommodating software diversity in chip multiprocessors", ISCA 2007.]] | ||
| + | * [[http://users.ece.cmu.edu/~omutlu/pub/heterogeneous-block-architecture_iccd14.pdf|Chris Fallin et al., "The Heterogeneous Block Architecture", ICCD 2014.]] | ||
| + | * [[http://hps.ece.utexas.edu/pub/TR-HPS-2014-001.pdf|Carlos Villavieja et al., "Yoga: A Hybrid Dynamic VLIW/OoO Processor", HPS Tech Report 2014.]] | ||
| Yang's literature survey: | Yang's literature survey: | ||
| + | * [[http://plaza.ufl.edu/chaol/File/Enabling-HPCA-2013.pdf|Chao Li et al., "Enabling distributed generation powered sustainable high-performance data center", HPCA 2013.]] | ||
| + | * [[https://www.usenix.org/system/files/conference/icac14/icac14-paper-li_chao.pdf|Chao Li et al., "Managing Green Datacenters Powered by Hybrid Renewable Energy Systems", ICAC 2014.]] | ||
| + | * [[http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6672933&tag=1|Sen Li et al., "Data center power control for frequency regulation", PES 2014.]] | ||
| + | |||
| + | |||
| + | === 9/25/2014 === | ||
| + | * [[http://www.cs.utah.edu/~rajeev/pubs/micro12.pdf|Chatterjee et al., "Leveraging Heterogeneity in DRAM Main Memories to Accelerate Critical Word Access", MICRO 2012.]] | ||
| + | * [[http://parsa.epfl.ch/cloudsuite/cloudsuite.html|CloudSuite]] | ||
| === 9/24/2014 === | === 9/24/2014 === | ||
| Kevin's literature survey: | Kevin's literature survey: | ||
| - | * [[http://users.ece.cmu.edu/~omutlu/pub/raidr-dram-refresh_isca12.pdf|Liu et al., "RAIDR: Retention-Aware Intelligent DRAM Refresh", ISCA 2012.]] | + | * **[[http://users.ece.cmu.edu/~omutlu/pub/raidr-dram-refresh_isca12.pdf|Liu et al., "RAIDR: Retention-Aware Intelligent DRAM Refresh", ISCA 2012.]]** |
| - | * [[http://users.ece.cmu.edu/~omutlu/pub/dram-retention-time-characterization_isca13.pdf|Liu et al., "An Experimental Study of Data Retention Behavior in Modern DRAM Devices: Implications for Retention Time Profiling Mechanisms", ISCA 2013.]] | + | * [[http://arch.ece.gatech.edu/pub/micro40.pdf|Mrinmoy Ghosh et al., "Smart Refresh: An Enhanced Memory Controller Design for Reducing Energy in Conventional and 3D Die-Stacked DRAMs", MICRO 2007.]] |
| - | * [[http://www.ece.cmu.edu/~safari/pubs/error-mitigation-for-intermittent-dram-failures_sigmetrics14.pdf|Khan et al., "The Efficacy of Error Mitigation Techniques for DRAM Retention Failures: A Comparative Experimental Study", SIGMETRICS 2014.]] | + | * [[http://www.cs.utah.edu/events/thememoryforum/kang.pdf|Kang et al., "Co-Architecting Controllers and DRAM to Enhance DRAM Process Scaling", Memory Forum 2014.]] |
| - | + | * [[http://people.engr.ncsu.edu/ericro/publications/conference_HPCA-12.pdf|Ravi K. Venkatesan et al, "Retention-aware placement in DRAM (RAPID): software methods for quasi-non-volatile DRAM", HPCA 2006.]] | |
| - | Amirali's literature survey: | + | * [[http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=4154211&tag=1|K. Ohyu et al, "Quantitative identification for the physical origin of variable retention time: A vacancy-oxygen complex defect model", IEDM 2006.]] |
| + | * [[http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5970110|Heesang Kim et al., "Characterization of the Variable Retention Time in Dynamic Random Access Memory", TED 2011.]] | ||
| + | * **[[http://users.ece.cmu.edu/~omutlu/pub/dram-retention-time-characterization_isca13.pdf|Liu et al., "An Experimental Study of Data Retention Behavior in Modern DRAM Devices: Implications for Retention Time Profiling Mechanisms", ISCA 2013.]]** | ||
| + | * **[[http://www.ece.cmu.edu/~safari/pubs/error-mitigation-for-intermittent-dram-failures_sigmetrics14.pdf|Khan et al., "The Efficacy of Error Mitigation Techniques for DRAM Retention Failures: A Comparative Experimental Study", SIGMETRICS 2014.]]** | ||
| === 9/23/2014 === | === 9/23/2014 === | ||
| Line 29: | Line 60: | ||
| Jiyuan's literature survey: | Jiyuan's literature survey: | ||
| - | * [[http://cseweb.ucsd.edu/~swanson/papers/ASPLOS2011Prefetching.pdf|Kamruzzaman et al., "Inter-core Prefetching for Multicore Processors Using Migrating Helper Threads", ASPLOS 2011.]] | + | * **[[http://cseweb.ucsd.edu/~swanson/papers/ASPLOS2011Prefetching.pdf|Kamruzzaman et al., "Inter-core Prefetching for Multicore Processors Using Migrating Helper Threads", ASPLOS 2011.]]** |
| - | * | + | * [[http://www.cs.ucf.edu/~zhou/dce_pact_2005_ieee.pdf|Zhou et al., "Dual-Core Execution: Building a Highly Scalable Single-Thread Instruction Window", PACT 2005.]] |
| + | * [[http://people.engr.ncsu.edu/ericro/publications/conference_ASPLOS-9.pdf|Sundaramoorthy et al., "Slipstream Processors: Improving both Performance and Fault Tolerance", ASPLOS 2000.]] | ||
| + | * **[[http://www.cs.utah.edu/wondp/sqrl.pdf|Kumar et al., "SQRL: Hardware Accelerator for Collecting Software Data Structures", PACT 2014.]]** | ||
| + | * **[[http://www.cse.ust.hk/catalac/papers/scatter_sc07.pdf|He et al., "Efficient Gather and Scatter Operations on Graphics Processors", SC 2007.]]** | ||
| + | * [[http://www.cs.utah.edu/~ald/pubs/hpca99.pdf|Carter et al., "Impulse: Building a Smarter Memory Controller", HPCA 1999.]] | ||
| + | * [[http://www.cs.utah.edu/~rajeev/pubs/asplos10.pdf|Sudan et al., "Micro-Pages: Increasing DRAM Efficiency with Locality-Aware Data Placement", ASPLOS 2010.]] | ||
| === 9/18/2014 === | === 9/18/2014 === | ||
readings.txt · Last modified: 2014/12/03 21:12 by yixinluo
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