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| DRAM reliab. | [[http://users.ece.cmu.edu/~omutlu/pub/error-mitigation-for-intermittent-dram-failures_sigmetrics14.pdf|Khan et al, "The Efficacy of Error Mitigation Techniques for DRAM Retention Failures: A Comparative Experimental Study", SIGMETRICS 2014.]] | | | DRAM reliab. | [[http://users.ece.cmu.edu/~omutlu/pub/error-mitigation-for-intermittent-dram-failures_sigmetrics14.pdf|Khan et al, "The Efficacy of Error Mitigation Techniques for DRAM Retention Failures: A Comparative Experimental Study", SIGMETRICS 2014.]] | | ||
| Security | [[|Govindavajhala et al., "Using Memory Errors to Attack a Virtual Machine", SP 2003.]] | | | Security | [[|Govindavajhala et al., "Using Memory Errors to Attack a Virtual Machine", SP 2003.]] | | ||
- | | Reliability | [[|Wang et al., "Onur Mutlu: Y-Branches: When You Come to a Fork in the Road, Take It", PACT 2003.]] | + | | Reliability | [[|Wang et al., "Onur Mutlu: Y-Branches: When You Come to a Fork in the Road, Take It", PACT 2003.]] | |
| 3d stacking | [[|Loh et al, "3D-Stacked Memory Architectures for Multi-core Processors", ISCA 2008.]] | | | 3d stacking | [[|Loh et al, "3D-Stacked Memory Architectures for Multi-core Processors", ISCA 2008.]] | | ||
| 3d stacking | [[|Black et al, "Die Stacking (3D) Microarchitecture", MICRO 2006.]] | | | 3d stacking | [[|Black et al, "Die Stacking (3D) Microarchitecture", MICRO 2006.]] | |