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| | [[http://www2.cs.uregina.ca/~pwlfong/CS499/writing-paper.pdf|Philip W. L. Fong, “How to Write a CS Research Paper: A Bibliography”, 2004.]] | | | | [[http://www2.cs.uregina.ca/~pwlfong/CS499/writing-paper.pdf|Philip W. L. Fong, “How to Write a CS Research Paper: A Bibliography”, 2004.]] | | ||
=== 9/3/2014 === | === 9/3/2014 === | ||
- | | | [[http://users.ece.cmu.edu/~omutlu/pub/salp-dram_isca12.pdf|Kim et al., "A Case for Exploiting Subarray-Level Parallelism (SALP) in DRAM", ISCA 2012.]] | | + | | DRAM arch. | [[http://users.ece.cmu.edu/~omutlu/pub/salp-dram_isca12.pdf|Kim et al., "A Case for Exploiting Subarray-Level Parallelism (SALP) in DRAM", ISCA 2012.]] | |
- | | | [[http://users.ece.cmu.edu/~omutlu/pub/raidr-dram-refresh_isca12.pdf|Liu et al., "RAIDR: Retention-Aware Intelligent DRAM Refresh", ISCA 2012.]] | | + | | DRAM arch. | [[http://users.ece.cmu.edu/~omutlu/pub/raidr-dram-refresh_isca12.pdf|Liu et al., "RAIDR: Retention-Aware Intelligent DRAM Refresh", ISCA 2012.]] | |
- | | | [[http://users.ece.cmu.edu/~omutlu/pub/flash-error-analysis-and-management_itj13.pdf|Cai et al, "Error Analysis and Retention-Aware Error Management for NAND Flash Memory", ITJ Vol. 17-1 2013]] | | + | | Flash | [[http://users.ece.cmu.edu/~omutlu/pub/flash-error-analysis-and-management_itj13.pdf|Cai et al, "Error Analysis and Retention-Aware Error Management for NAND Flash Memory", ITJ Vol. 17-1 2013.]] | |
- | | | [[http://users.ece.cmu.edu/~omutlu/pub/error-mitigation-for-intermittent-dram-failures_sigmetrics14.pdf|Khan et al, "The Efficacy of Error Mitigation Techniques for DRAM Retention Failures: A Comparative Experimental Study", SIGMETRICS 2014]] | | + | | DRAM reliab. | [[http://users.ece.cmu.edu/~omutlu/pub/error-mitigation-for-intermittent-dram-failures_sigmetrics14.pdf|Khan et al, "The Efficacy of Error Mitigation Techniques for DRAM Retention Failures: A Comparative Experimental Study", SIGMETRICS 2014.]] | |
+ | | Security | [[|Govindavajhala et al., "Using Memory Errors to Attack a Virtual Machine", SP 2003.]] | | ||
+ | | Reliability | [[|Wang et al., "Onur Mutlu: Y-Branches: When You Come to a Fork in the Road, Take It", PACT 2003.]] | ||
+ | | 3d stacking | [[|Loh et al, "3D-Stacked Memory Architectures for Multi-core Processors", ISCA 2008.]] | | ||
+ | | 3d stacking | [[|Black et al, "Die Stacking (3D) Microarchitecture", MICRO 2006.]] | | ||
+ | | In mem comp. | [[|Kogge et al, "EXECUBE - A New Architecture for Scalable MPPs".]] | | ||
+ | | In mem comp. | [[|"The Energy Efficiency of IRAM Architectures", ISCA 1997.]] | | ||
+ | | In mem comp. | [[|"A Case for Intelligent DRAM: IRAM", IEEE Micro 1997.]] | |